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ADS1243IPWR Datasheet(PDF) 22 Page - Texas Instruments |
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ADS1243IPWR Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 25 page ![]() ADS1242, 1243 22 SBAS235B www.ti.com +5V SUPPLY ANALOG INPUT(1) GENERAL EQUATIONS DIFFERENTIAL PGA OFFSET FULL-SCALE DIFFERENTIAL PGA SHIFT GAIN SETTING FULL-SCALE RANGE INPUT VOLTAGES(2) RANGE RANGE INPUT VOLTAGES(2) RANGE 15V ±2.5V ±1.25V 22.5V ±1.25V ±0.625V 4 1.25V ±0.625V ±312.5mV 8 0.625V ±312.5mV ±156.25mV 16 312.5mV ±156.25mV ±78.125mV 32 156.25mV ±78.125mV ±39.0625mV 64 78.125mV ±39.0625mV ±19.531mV 128 39.0625mV ±19.531mV ±9.766mV NOTES: (1) With a +2.5V reference. (2) Refer to electrical specification for analog input voltage range. TABLE VI. Full-Scale Range versus PGA Setting. RANGE = 0 RANGE = 1 V PGA REF ± • V PGA REF 2 ± • V PGA REF 4 f f mfactor SAMP OSC = • 8 f f mfactor SAMP OSC = • 4 f f mfactor SAMP OSC = • 2 f f mfactor SAMP OSC = PGA SETTING SAMPLING FREQUENCY 1, 2, 4, 8 16 32 64, 128 SPEED = 0 SPEED = 1 mfactor 128 256 DEFINITION OF TERMS An attempt has been made to be consistent with the termi- nology used in this data sheet. In that regard, the definition of each term is given as follows: Analog Input Voltage—the voltage at any one analog input relative to GND. Analog Input Differential Voltage—given by the following equation: (IN+) – (IN–). Thus, a positive digital output is produced whenever the analog input differential voltage is positive, while a negative digital output is produced whenever the differential is negative. For example, when the converter is configured with a 2.5V reference and placed in a gain setting of 1, the positive full-scale output is produced when the analog input differen- tial is 2.5V. The negative full-scale output is produced when the differential is –2.5V. In each case, the actual input voltages must remain within the GND to VDD range. Conversion Cycle—the term conversion cycle usually refers to a discrete A/D conversion operation, such as that per- formed by a successive approximation converter. As used here, a conversion cycle refers to the tDATA time period. Data Rate—The rate at which conversions are completed. See definition for fDATA. f f SPEED DR DATA osc SPEED DR = •• • = = 128 2 1280 2 01 01 2 , ,, fOSC—the frequency of the crystal oscillator or CMOS com- patible input signal at the XIN input of the ADS1242 and ADS1243. fMOD—the frequency or speed at which the modulator of the ADS1242 and ADS1243 is running. This depends on the SPEED bit as given by the following equation: f f mfactor f MOD osc osc SPEED == • 128 2 fSAMP—the frequency, or switching speed, of the input sam- pling capacitor. The value is given by one of the following equations: fDATA—the frequency of the digital output data produced by the ADS1242 and ADS1243, fDATA is also referred to as the Data Rate. Full-Scale Range (FSR)—as with most A/D converters, the full-scale range of the ADS1242 and ADS1243 is defined as the input, that produces the positive full-scale digital output minus the input, that produces the negative full-scale digital output. For example, when the converter is configured with a 2.5V reference and is placed in a gain setting of 2, the full-scale range is: [1.25V (positive full-scale) minus –1.25V (negative full-scale)] = 2.5V. Least Significant Bit (LSB) Weight—this is the theoretical amount of voltage that the differential voltage at the analog input has to change in order to observe a change in the output data of one least significant bit. It is computed as follows: LSB Weight Full ScaleRange N = − 21 – where N is the number of bits in the digital output. tDATA—the inverse of fDATA, or the period between each data output. |
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