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DS99R102VS/NOPB Datasheet(PDF) 1 Page - Texas Instruments |
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DS99R102VS/NOPB Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 29 page ![]() DS99R101, DS99R102 www.ti.com SNLS240D – MARCH 2007 – REVISED APRIL 2013 DS99R101/DS99R102 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer Check for Samples: DS99R101, DS99R102 1 FEATURES Receiver • 48-Pin TQFP Package 2 • 3 MHz–40 MHz Clock Embedded and DC- Balancing 24:1 and 1:24 Data Transmissions • Pure CMOS .35 μm Process • User Selectable Clock Edge for Parallel Data • Power Supply Range 3.3V ± 10% on Both Transmitter and Receiver • Temperature Range 0°C to +70°C • Internal DC Balancing Encode/Decode – • 8 kV HBM ESD Tolerance Supports AC-Coupling Interface with No External Coding Required DESCRIPTION • Individual Power-Down Controls for Both The DS99R101/DS99R102 Chipset translates a 24- Transmitter and Receiver bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. • Embedded Clock CDR (Clock and Data This single serial stream simplifies transferring a 24- Recovery) on Receiver and No External Source bit bus over PCB traces and cable by eliminating the of Reference Clock Needed skew problems between parallel data and clock • All Codes RDL (Random Data Lock) to Support paths. It saves system cost by narrowing data paths Live-Pluggable Applications that in turn reduce PCB layers, cable width, and connector size and pins. • LOCK Output Flag to Ensure Data Integrity at Receiver Side The DS99R101/DS99R102 incorporates LVDS • Balanced TSETUP/THOLD Between RCLK and signaling on the high-speed I/O. LVDS provides a low power and low noise environment for reliably RDATA on Receiver Side transferring data over a serial transmission path. By • PTO (Progressive Turn-On) LVCMOS Outputs optimizing the serializer output edge rate for the to Reduce EMI and Minimize SSO Effects operating frequency range EMI is further reduced. • All LVCMOS Inputs and Control Pins Have Internal DC balanced encoding/decoding is used to Internal Pulldown support AC-Coupled interconnects. • On-Chip Filters for PLLs on Transmitter and 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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