ADUC845 datasheet(51/108 Pages) AD

51 / 108 page

ADuC845/ADuC847/ADuC848

Rev. A | Page 51 of 108

USING FLASH/EE DATA MEMORY

The 4 kbytes of Flash/EE data memory are configured as 1024

pages, each of 4 bytes. As with the other ADuC845/ADuC847/

ADuC848 peripherals, the interface to this memory space is via

a group of registers mapped in the SFR space. A group of four

data registers (EDATA1–4) holds the 4 bytes of data at each

page. The page is addressed via the EADRH and EADRL

registers. Finally, ECON is an 8-bit control register that can be

written to with one of nine Flash/EE memory access commands

to trigger various read, write, erase, and verify functions. A block

diagram of the SFR interface to the Flash/EE data memory array

is shown in Figure 32.

ECON—Flash/EE Memory Control SFR

Programming either Flash/EE data memory or Flash/EE

program memory is done through the Flash/EE memory

control SFR (ECON). This SFR allows the user to read, write,

erase, or verify the 4 kbytes of Flash/EE data memory or the

56 kbytes of Flash/EE program memory.

BYTE 1

(0000H)

BYTE 1

(0004H)

BYTE 1

(0008H)

BYTE 1

(000CH)

BYTE 1

(0FF8H)

BYTE 1

(0FFCH)

BYTE 2

(0001H)

BYTE 2

(0005H)

BYTE 2

(0009H)

BYTE 2

(000DH)

BYTE 2

(0FF9H)

BYTE 2

(0FFDH)

BYTE 3

(0002H)

BYTE 3

(0006H)

BYTE 3

(000AH)

BYTE 3

(000EH)

BYTE 3

(0FFAH)

BYTE 3

(0FFEH)

BYTE 4

(0003H)

BYTE 4

(0007H)

BYTE 4

(000BH)

BYTE 4

(000FH)

BYTE 4

(0FFBH)

(0FFFH)

01H

00H

02H

03H

3FEH

3FFH

BYTE

ADDRESSES

ARE GIVEN IN

BRACKETS

BYTE 4

Figure 32. Flash/EE Data Memory Control and Configuration

Table 32. ECON—Flash/EE Memory Commands

ECON Value

Command Description

(Normal Mode, Power-On Default)

Command Description

(ULOAD Mode)

01H Read

4 bytes in the Flash/EE data memory, addressed by the

page address EADRH/L, are read into EDATA1–4.

Not implemented. Use the MOVC instruction.

02H Write

Results in 4 bytes in EDATA1–4 being written to the

Flash/EE data memory, at the page address given by

EADRH (0

≤ EADRH < 0400H). Note that the 4 bytes in the

page being addressed must be pre-erased.

Bytes 0 to 255 of internal XRAM are written to the 256 bytes of

Flash/EE program memory at the page address given by

EADRH/L (0

≤ EADRH/L < E0H).

Note that the 256 bytes in the page being addressed must be

pre-erased.

03H

Reserved.

04H Verify

Verifies that the data in EDATA1–4 is contained in the

page address given by EADRH/L. A subsequent read of

the ECON SFR results in a 0 being read if the verification

is valid, or a nonzero value being read to indicate an

invalid verification.

Not implemented. Use the MOVC and MOVX instructions to

verify the Write in software.

05H Erase Page

4-byte page of Flash/EE data memory address is erased

by the page address EADRH/L.

64-byte page of FLASH/EE program memory addressed by the

byte address EADRH/L is erased. A new page starts when EADRL

is equal to 00H, 80H, or C0H.

06H Erase All

4 kbytes of Flash/EE data memory are erased.

The entire 56 kbytes of ULOAD are erased.

81H ReadByte

The byte in the Flash/EE data memory, addressed by the

byte address EADRH/L, is read into EDATA1 (0

≤ EADRH/L

≤ 0FFFH).

Not implemented. Use the MOVC command.

82H WriteByte

The byte in EDATA1 is written into Flash/EE data memory

at the byte address EADRH/L.

The byte in EDATA1 is written into Flash/EE program memory at

the byte address EADRH/L (0 ≤ EADRH/L ≤ DFFFH).

0FH EXULOAD

Configures the ECON instructions (above) to operate on

Flash/EE data memory.

Enters normal mode, directing subsequent ECON instructions to

operate on the Flash/EE data memory.

F0H ULOAD

Enters ULOAD mode; subsequent ECON instructions

operate on Flash/EE program memory.

Enables the ECON instructions to operate on the Flash/EE

program memory. ULOAD entry mode.

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