ADUC702 datasheet(13/80 Pages) AD

13 / 80 page

Preliminary Technical Data

ADuC702x Series

Rev. PrB | Page 13 of 80

Pin#

Mnemonic

Type*

Function

IRQ0/P0.4/CONVSTART/PLAO[1]

I/O

Multifunction I/O pin:

External Interrupt Request 0, active high / General Purpose Input-Output Port

0.4 / Start conversion input signal for ADC / Programmable Logic Array

Output Element 1

IRQ1/P0.5/ADCBUSY/PLAO[2]

I/O

Multifunction I/O pin:

External Interrupt Request 1, active high / General Purpose Input-Output Port

0.5 / ADCBUSY signal / Programmable Logic Array Output Element 2

P2.0/PWMTRIP/SPM9/PLAO[5]/CONVSTART

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 2.0 / PWM safety cut off / UART /

Programmable Logic Array Output Element 5/ Start conversion input signal

for ADC

P0.7/ECLK/SPM8/PLAO[4]/XCLK

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 0.7 / Output for External Clock signal /

UART / Programmable Logic Array Output Element 4/ Input to the internal

clock generator circuits

XCLKO

Output from the crystal oscillator inverter

XCLKI

Input to the crystal oscillator inverter and input to the internal clock

generator circuits

P3.6/PWMTRIP/PLAI[14]

I/O

General Purpose Input-Output Port 3.6/ PWM safety cut off / Programmable

Logic Array Input Element 14

P3.7/PWMSYNC/PLAI[15]

I/O

General Purpose Input-Output Port 3.7/ PWM synchronisation input output

/Programmable Logic Array Input Element 15

P1.7/SPM7/PLAO[0]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.7 / UART / SPI / Programmable Logic

Array Output Element 0

P1.6/SPM6/PLAI[6]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.6 / UART / SPI / Programmable Logic

Array Input Element 6

IOGND

Ground for GPIO. Typically connected to DGND

IOVDD

3.3V Supply for GPIO and input of the on-chip voltage regulator.

P4.0/PLAO[8]

I/O

General Purpose Input-Output Port 4.0 / Programmable Logic Array Output

Element 8

P4.1/PLAO[9]

I/O

General Purpose Input-Output Port 4.1 / Programmable Logic Array Output

Element 9

P1.5/SPM5/PLAI[5]/IRQ3

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.5 / UART / SPI / Programmable Logic

Array Input Element 5/ External Interrupt Request 3, active high

P1.4/SPM4/PLAI[4]/IRQ2

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.4 / UART / SPI / Programmable Logic

Array Input Element 4/ External Interrupt Request 2, active high

P1.3/SPM3/PLAI[3]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.3/ UART / I2C1 /Programmable Logic

Array Input Element 3

P1.2/SPM2/PLAI[2]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.2 / UART / I2C1 /Programmable Logic

Array Input Element 2

P1.1/SPM1/PLAI[1]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.1 / UART / I2C0 / Programmable Logic

Array Input Element 1

P1.0/T1/SPM0/PLAI[0]

I/O

Serial Port Multiplexed:

General Purpose Input-Output Port 1.0/ Timer 1 Input / UART / I2C0 /

Programmable Logic Array Input Element 0

P4.2/PLAO[10]

I/O

General Purpose Input-Output Port 4.2 / Programmable Logic Array Output

Element 10

ADUC702 Datasheet(PDF) 13 Page - Analog Devices

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