THS8200 datasheet(51/97 Pages) TI

51 / 97 page

4–36

0.700 V/1.305 V

0.000 V/0.000 V

1023

Figure 4–39. RGB Without Sync Insertion or Composite Video Output

The figure below shows the linear DAC I/O relationship for either of the two nominal full-scale settings.

0.700 V

1.305 V

1023

255

511

767

Input Digital Codes

Ramping Output With Different Full-Scale Ranges

Figure 4–40. Ramping Output With Different Full-Scale Ranges

4.8.2

SMPTE-Compatible RGB Output With Sync Signal Inserted on G (Green) Channel

In this mode, a tri-level (HDTV modes)/bi-level (SDTV modes) sync signal is inserted into the G channel. The nominal

analog output voltage range, which is from the sync tip to the peak of active video, is from 0.0 V to 1.050 V. During

the active video period, the peak-to-peak ac value (dynamic range) is 700 mV (from 350 mV to 1050 mV). The blank

levels on all three channels correspond to the bottom code 64 and are at 350 mV. Figure 4–41 and Figure 4–42

illustrate the analog video output signals, both the output from the G channel with a tri-level or a bi-level sync pulse

inserted, as well as the outputs from R and B channels. No sync signal is inserted during the sync period on R and

B channels.

Alternatively, sync can be inserted on all three channels on THS8200 by appropriately programming the sync

amplitude levels. On those channels where no sync is inserted, the blank levels are maintained at a 350-mV dc level.

THS8200 Datasheet(PDF) 51 Page - Texas Instruments