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LM3204 Datasheet(PDF) 15 Page - Texas Instruments |
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LM3204 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 24 page ![]() LM3204 www.ti.com SNVS351C – JUNE 2005 – REVISED APRIL 2013 EN should be set low to turn off the LM3204 during power-up and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The LM3204 is designed for compact portable applications, such as mobile phones. In such applications, the system controller determines power supply sequencing and requirements for small package size outweigh the benefit of including UVLO (Under Voltage Lock-Out) circuitry. Dynamically Adjustable Output Voltage The LM3204 features dynamically adjustable output voltage to eliminate the need for external feedback resistors. The output can be set from 0.8V to 3.6V by changing the voltage on the analog VCON pin. This feature is useful in PA applications where peak power is needed only when the handset is far away from the base station or when data is being transmitted. In other instances, the transmitting power can be reduced. Hence the supply voltage to the PA can be reduced, promoting longer battery life. See Setting the Output Voltage section for further details. Over Voltage Protection The LM3204 has an over voltage comparator that prevents the output voltage from rising too high, when the device is left in PWM mode under light-load conditions, during output voltage steps, or during startup. When the output voltage rises to 330mV over its target, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the target. During the over voltage protection mode, both the PWM PFET and the NFET synchronous rectifier are off. When the part comes out of the over voltage protection mode, the NFET synchronous rectifier remains off for approximately 3.5µs to avoid inductor current going negative. Internal Synchronous Rectification While in PWM mode, the LM3204 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. With medium and heavy loads, the internal NFET synchronous rectifier is turned on during the inductor current down slope in the second part of each cycle. The synchronous rectifier is turned off prior to the next cycle. There is no zero cross detect, which means that the NFET can conduct current in both directions and inductor current is always continuous. The advantage of this method is that the part remains in PWM mode at light loads or no load conditions. The NFET has a current limit. The NFET is designed to conduct through its intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. Current Limiting A current limit feature allows the LM3204 to protect itself and external components during overload conditions. In PWM mode, a 940mA (max.) cycle-by-cycle current limit is normally used. If an excessive load pulls the output voltage down to below approximately 0.375V, indicating a possible short to ground, then the device switches to a timed current limit mode. In timed current limit mode, the internal PFET switch is turned off after the current comparator trips, and the beginning of the next cycle is inhibited for 3.5µs to force the instantaneous inductor current to ramp down to a safe value. After the 3.5µs interval, the internal PFET is turned on again. This cycle is repeated until the load is reduced and the output voltage exceeds approximately 0.375V. Therefore, the device may not startup if an excessive load is connected to the output when the device is enabled. The synchronous rectifier is off in the timed current limit mode. Timed current limit prevents the loss of current control seen in some products when the output voltage is pulled low in serious overload conditions. A current limit is also provided for the NFET. This is approximately −500mA. Both the NFET and the PFET are turned off in negative current limit until the PFET is turned on again at the beginning of the next cycle. The negative current limit inhibits buildup of excessive negative inductor current. In the Bypass mode, the bypass current limit is 1000mA (typ.). The output voltage drops when the bypass current limit kicks in. Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: LM3204 |
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