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SP211EH Datasheet(PDF) 8 Page - Exar Corporation |
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SP211EH Datasheet(HTML) 8 Page - Exar Corporation |
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8 / 16 page ![]() Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com SP2EH_23EH_0_060 8 Charge–Pump The charge pump is a Exar-patenteddesign (5,306,954) and uses a unique approach compared to older less-efficient designs. The charge pumps still requires four external capacitors, but uses a four-phase voltage shifting technique to attain symmetrical 0V power supplies. Figure 3a shows the wave- form found on the positive side of capacitor C2, and Figure 3b shows the negative side of capacitor C2. There is a free-running oscillator that controls the four phases of the voltage shifting. A description of each phaseisasfollows: +10V a) C 2 + gND gND b) C 2 – –10V Figure 5. Typical waveforms seen on ca- pacitor C2 when all drivers are at maximum load. Phase 1 — V SS charge storage —During this phase of theclockcycle,thepositivesideofcapacitors C and C2 are initially charged to +5V. C + is then switched to ground and charge on C – is transferred to C 2 – . Since C 2 + is connected to +5V, the voltage potential across capacitor C 2 is now 0V. Phase 2 — V SS transfer — Phase two of the clock con- nects the negative terminal of C 2 to the VSS storage capacitor and the positive terminal of C 2 to ground, and transfers the generated –l0V to C 3. Simultaneously, the positive side of capacitor C is switched to +5V and the negative side is connected to ground. Phase 3 — V DD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C produces –5V in the negative terminal of C , which is applied to the negative side of capacitor C 2. Since C2 + is at +5V, the voltage potential across C 2 is l0V. Phase 4 — V DD transfer — The fourth phase of the clock connects the negative terminal of C 2 to ground and transfers the generated l0V across C 2 to C4, the VDD storage capacitor. Again, simultaneously with this, the positive side of capacitor C is switched to +5V and the negative side is connected to ground, and the cycle begins again. Since both V+ and V– are separately gen- erated from V CC in a no–load condition, V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficienciesinthedesign. The clock rate for the charge pump typically operates at 5kHz. The external capacitors must be a minimum of 0.µF with a 6V breakdown rating. |
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