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LME49600 Datasheet(PDF) 2 Page - Texas Instruments |
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LME49600 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 21 page ![]() AV = 1 1 2 3 4 5 VIN BW VEE VCC VOUT TAB (VEE) Q2 Q1 200: Q3 Q4 Q5 Q6 OUT VCC VEE Thermal Shutdown IN BW D1 - D7 D8 - D14 I1 I2 I LME49600 SNAS422E – JANUARY 2008 – REVISED APRIL 2013 www.ti.com Functional Block Diagram Figure 2. Simplified Circuit Diagram (Note: I1 and I2 are mirrored from I) Connection Diagram The KTT package is non-isolated package. The package's metal back and any heat sink to which it is mounted are connected to the same potential as the -VEE pin. Figure 3. KTT Package (Top View) See Package Number KTT0005B These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LME49600 |
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