Write cmd

(sdio_mod

e_en reg)

Write data

(0xFE first

byte of

sdio_mode

_en reg)

Write

data

(0xED)

Read cmd (to

read contents of

any register

specified by the

address bits)

SDI

SDO

Read data

Write cmd

(sdio_mode

_en reg)

Bus turnaround time = half cycle

CSB

Sequence of transactions for unlocking SDIO_MODE

Note:

1. Once the SDIO_mode is unlocked. The user can read as many registers as long as nothing

else is written to sdio_mode_en register to disturb the state of SDIO_mode

2. The separate signals SDI and SDO are given in the figure for the sake of understanding.

However, only one signal SDIO exists in the design

LMP91050

SNAS517E – NOVEMBER 2011 – REVISED SEPTEMBER 2015

www.ti.com

Programming (continued)

Figure 25. Enable SDIO Mode for Reading SPI Registers

8.5.1.3 Registers Organization

Configuring the device is achieved using Write of the designated registers in the device. All the registers are

organized into individually addressable byte-long registers that have a unique address. The format of the Write/

Read instruction is as shown below.

Table 3. Write / Read Instruction Format

Bit[7]

Bit[6:4]

Bit[3:0]

0 : Write Instruction

Reserved to 0

Address

1 : Read Instruction

8.6 Register Maps

This section describes the programmable registers and the associated programming sequence, if any, for the

device. Table 4 shows the summary listing of all the registers that are available to the user and their power-up

values.

Table 4. Register Descriptions

Power-up/Reset

Title

Address (Hex)

Type

Value (Hex)

Read-Write

Device Configuration

0x0

0x0

(Read allowed in SDIO Mode)

Read-Write

DAC Configuration

0x1

0x80

(Read allowed in SDIO Mode)

SDIO Mode Enable

0xF

Write-only

0x0

16

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