TCM8002

DATA PROCESSOR FOR CELLULAR TELEPHONE

SLWS008C − SEPTEMBER 1994 − REVISED JUNE 1996

8

POST OFFICE BOX 655303

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

Figure 1 shows the timing for processor read and write operations. DATAOUT has a 3-state driver and normally

presents the high-impedance state as shown in Figure 1. This allows DATAIN and DATAOUT be be tied together to

a bidirectional microprocessor pin.

1

A5

A4

A3

A2

A1

A0

1D6

D5

D4

D3

D2

D1

D0

D7

A6

A5

A4

A3

A2

A1

A0

0

tsu1

th1

tsu2

th2

Start

Bit

Write Address

Write Data

23

4

5

6

7

8

1

23

4

5

67

8

12

3

4

56

78

1

2

3

4

9

10

11

12

Q10

Q9

Q3

Q2

Q1

Q11

Start

Bit

Read Address

0

tc(er)

Q0

Read Data

DATAIN

DATAOUT

DCLK

CS

DATAIN

DCLK

CS

Write

Read

A6

Q6

Q5

Q3

Q2

Q1

Q7

0

Q0

Read Data

DATAOUT

Q4

(from event register)

(from any other register)

tc

tc(or)

Read Start Bit

Figure 1. Microprocessor-Interface Timing