25AA1024ISLASHMF datasheet(13/36 Pages) MICROCHIP

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DS20001836J-page 13

25AA1024

2.5

Write Status Register Instruction

(WRSR)

The Write Status Register instruction (WRSR) allows the

user to write to the nonvolatile bits in the STATUS

select one of four levels of protection for the array by

writing to the appropriate bits in the STATUS register.

The array is divided up into four segments. The user

has the ability to write-protect none, one, two, or all four

of the segments of the array. The partitioning is

controlled, as shown in Table 2-3.

The Write-Protect Enable (WPEN) bit is a nonvolatile

bit that is available as an enable bit for the WP pin. The

Write-Protect (WP) pin and the Write-Protect Enable

(WPEN) bit in the STATUS register control the

programmable

hardware

write-protect

feature.

Hardware write protection is enabled when the WP pin

is low and the WPEN bit is high. Hardware write

protection is disabled when either the WP pin is high or

the WPEN bit is low. When the chip is hardware

write-protected, only writes to nonvolatile bits in the

STATUS register are disabled. See Table 2-4 for a

matrix of functionality on the WPEN bit.

See Figure 2-7 for the WRSR timing sequence.

TABLE 2-3:

ARRAY PROTECTION

FIGURE 2-7:

WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)

BP1

BP0

Array Addresses

Write-Protected

Array Addresses

Unprotected

none

All (Sectors 0, 1, 2 & 3)

(00000h-1FFFFh)

Upper 1/4 (Sector 3)

(18000h-1FFFFh)

Lower 3/4 (Sectors 0, 1 & 2)

(00000h-17FFFh)

Upper 1/2 (Sectors 2 & 3)

(10000h-1FFFFh)

Lower 1/2 (Sectors 0 & 1)

(00000h-0FFFFh)

All (Sectors 0, 1, 2 & 3)

(00000h-1FFFFh)

none

1011

12131415

Instruction

Data to STATUS register

High-Impedance

SCK

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