Ground

Input

Capacitor

Output

Capacitor

OUT

SENSE

SHUTDOWN

GND

ERROR

IN

5V TAP

FEEDBACK

Error Pullup

Resistor

1

2

3

Input

Capacitor

Output

Capacitor

Ground

18

LP2954, LP2954A

SNVS096E – JUNE 1999 – REVISED JULY 2016

www.ti.com

Product Folder Links: LP2954 LP2954A

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Copyright © 1999–2016, Texas Instruments Incorporated

10 Layout

10.1 Layout Guidelines

For best overall performance, place all the circuit components on the same side of the circuit board and as near

as practical to the respective LDO pin connections. Place ground return connections to the input and output

capacitor, and to the LDO ground pin as close as possible to each other, connected by a wide, component-side,

copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and

negatively affects system performance. This grounding and layout scheme minimizes inductive parasitic, and

thereby reduces load-current transients, minimizes noise, and increases circuit stability.

TI also recommends a ground reference plane and is either embedded in the PCB itself or located on the bottom

side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage,

shield noise, and behaves similar to a thermal plane to spread heat from the LDO device. In most applications,

this ground plane is necessary to meet thermal requirements.

10.2 Layout Example

Figure 25. LP2954 TO-263 Board Layout

Figure 26. LP2954 SOIC Board Layout