LP3913 datasheet(58/70 Pages) TI1

58 / 70 page

1.0

2.0

3.0

4.0

5.0

DC BIAS (V)

20%

40%

60%

80%

100%

0402, 6.3V, X5R

0603, 10V, X5R

LP3913

SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013

www.ti.com

Output Capacitor

The LDOs on the LP3913 are designed specifically to work with very small ceramic output capacitors. A 1.0

μF

ceramic capacitor (temperature types Z5U, Y5V or X7R) with ESR between 5 m

Ω to 500 mΩ, are suitable in the

application circuit.

It is also possible to use tantalum or film capacitors at the device output, COUT (or VOUT), but these are not as

attractive for reasons of size and cost.

The output capacitor must meet the requirement for the minimum value of capacitance and also have an ESR

value that is within the range 5 m

Ω to 500 mΩ for stability.

Capacitor Characteristics

The LDOs are designed to work with ceramic capacitors on the output to take advantage of the benefits they

offer. For capacitance values in the range of 0.47 µF to 4.7 µF, ceramic capacitors are the smallest, least

expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The

ESR of a typical 1.0 µF ceramic capacitor is in the range of 20 m

Ω to 40 mΩ, which easily meets the ESR

requirement for stability for the LDO’s.

For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure

correct device operation. The capacitor value can change greatly, depending on the operating conditions and

capacitor type.

In particular, the output capacitor selection should take account of all the capacitor parameters, to ensure that the

specification is met within the application. The capacitance can vary with DC bias conditions as well as

temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging.

The capacitor parameters are also dependent on the particular case size, with smaller sizes giving poorer

performance figures in general. As an example, the graph below shows a typical graph comparing different

capacitor case sizes in a Capacitance vs. DC Bias plot.

Figure 69. Graph Showing a Typical Variation in Capacitance vs. DC Bias

As shown in the graph, increasing the DC Bias condition can result in the capacitance value that falls below the

minimum value given in the recommended capacitor specifications table. Note that the graph shows the

capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended

that the capacitor manufacturers’ specifications for the nominal value capacitor are consulted for all conditions,

as some capacitor sizes (e.g. 0402) may not be suitable in the actual application.

Submit Documentation Feedback

Product Folder Links: LP3913

LP3913 Datasheet(PDF) 58 Page - Texas Instruments

LP3913 Datasheet(HTML) 58 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

Datasheet Download

Link URL