UCC28713 datasheet(13/34 Pages) TI1

13 / 34 page

UCC28710, UCC28711, UCC28712, UCC28713, UCC28714, UCC28715, UCC28716

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SLUSB86B – NOVEMBER 2012 – REVISED JULY 2015

Device Functional Modes (continued)

Figure 13. Simplified Flyback Convertor

(With the Main Voltage Regulation Blocks)

In primary-side control, the output voltage is sensed on the auxiliary winding during the transfer of transformer

energy to the secondary. As shown in Figure 14 it is clear there is a down slope representing a decreasing total

rectifier VF and resistance voltage drop (ISRS) as the secondary current decreases to zero. To achieve an

accurate representation of the secondary output voltage on the auxiliary winding, the discriminator reliably blocks

the leakage inductance reset and ringing, continuously samples the auxiliary voltage during the down slope after

the ringing is diminished, and captures the error signal at the time the secondary winding reaches zero current.

The internal reference on VS is 4.05 V. Temperature compensation on the VS reference voltage of -0.8-mV/°C

offsets the change in the output rectifier forward voltage with temperature. The resistor divider is selected as

outlined in the VS pin description.

Figure 14. Auxiliary Winding Voltage

The UCC28710 family includes a VS signal sampler that signals discrimination methods to ensure an accurate

sample of the output voltage from the auxiliary winding. There are however some details of the auxiliary winding

signal to ensure reliable operation, specifically the reset time of the leakage inductance and the duration of any

subsequent leakage inductance ring. Refer to Figure 15 below for a detailed illustration of waveform criteria to

ensure a reliable sample on the VS pin. The first detail to examine is the duration of the leakage inductance reset

pedestal, tLK_RESET in Figure 15. Because this can mimic the waveform of the secondary current decay, followed

by a sharp downslope, it is important to keep the leakage reset time less than 600 ns for IPRI minimum, and less

than 2.2 µs for IPRI maximum. The second detail is the amplitude of ringing on the VAUX waveform following

tLK_RESET. The peak-to-peak voltage at the VS pin should be less than approximately 100 mVp-p at least 200 ns

before the end of the demagnetization time, tDM. If there is a concern with excessive ringing, it usually occurs

during light or no-load conditions, when tDM is at the minimum. The tolerable ripple on VS is scaled up to the

auxiliary winding voltage by RS1 and RS2, and is equal to 100 mV x (RS1 + RS2) / RS2.

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