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DS3886AVF Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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DS3886AVF Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 11 page ![]() Pin Description (Continued) nected to the backplane ground). If the external ground floats considerably during transients, precautionary steps should be taken to prevent QGND from moving with reference to the backplane ground. The receiver threshold should have the same ground reference as the signal coming from the backplane. A voltage offset between their grounds will degrade the noise margin. Note 12: The same considerations for ground are used for V CC in reducing lead inductance (see (Note 10) ). QVCC and VCC should be tied together externally. If live insertion is not supported, the LI pin can be tied together with QV CC and VCC. CD T/R LE RBYP ACK An Bn HX X X X Z H LH X H X L H LH X H X H L LH X L X X Bn 0 L H X L L-H H L L H X L L-H L H LL H X X H L LL H X X L H LLL X X An 0 X X = High or low logic state Z = High impedance state L = Low state H = High state L-H = Low to high transition An0 = no change from previous state Bn0 = no change from previous state BTL = high and low state are nominally 2.1V and 1.0V, respectively. TTL = high and low state are nominally 2.4V and 0.5V, respectively. Package Thermal Characteristics Linear Feet per θ JA (˚C/W) Minute Air 44-Pin 44-Pin Flow (LFPM) PQFP PLCC 082 45 225 68 35 500 60 30 900 53 26 Note 13: The above values are typical values and are different from the Absolute Maximum Rating values, which include guardbands. www.national.com 6 |
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