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TMS570LS1114 Datasheet(PDF) 88 Page - Texas Instruments

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Part # TMS570LS1114
Description  16- and 32-Bit RISC Flash Microcontroller
PDF  169 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS570LS1114 Datasheet(HTML) 88 Page - Texas Instruments

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EMIF_CLK
EMIF_BA[1:0]
EMIF_ADDR[12:0]
EMIF_DATA[15:0]
1
2
2
4
6
8
8
12
10
16
3
5
7
7
11
13
15
9
BASIC SDRAM
WRITE OPERATION
EMIF_CS[0]
EMIF_DQM[1:0]
EMIF_nRAS
EMIF_nCAS
EMIF_nWE
TMS570LS1114
SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015
www.ti.com
Figure 6-17. Basic SDRAM Write Operation
Table 6-29. EMIF Synchronous Memory Timing Requirements
NO.
Parameter
MIN
MAX
Unit
19
tsu(EMIFDV-EM_CLKH)
Input setup time, read data valid on
2
ns
EMIF_DATA[15:0] before EMIF_CLK
rising
20
th(CLKH-DIV)
Input hold time, read data valid on
2
ns
EMIF_DATA[15:0] after EMIF_CLK
rising
Table 6-30. EMIF Synchronous Memory Switching Characteristics
NO.
Parameter
MIN
MAX
Unit
1
tc(CLK)
Cycle time, EMIF clock EMIF_CLK
22
ns
2
tw(CLK)
Pulse width, EMIF clock EMIF_CLK
5
ns
high or low
3
td(CLKH-CSV)
Delay time, EMIF_CLK rising to
13
ns
EMIF_nCS[0] valid
4
toh(CLKH-CSIV)
Output hold time, EMIF_CLK rising to
1
ns
EMIF_nCS[0] invalid
5
td(CLKH-DQMV)
Delay time, EMIF_CLK rising to
13
ns
EMIF_nDQM[1:0] valid
6
toh(CLKH-DQMIV)
Output hold time, EMIF_CLK rising to
1
ns
EMIF_nDQM[1:0] invalid
7
td(CLKH-AV)
Delay time, EMIF_CLK rising to
13
ns
EMIF_ADDR[12:0] and EMIFBA[1:0]
valid
88
System Information and Electrical Specifications
Copyright © 2012–2015, Texas Instruments Incorporated
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Product Folder Links: TMS570LS1114



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