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A29400B Datasheet(PDF) 13 Page - AMIC Technology

Part # A29400B
Description  512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory
PDF  34 Pages
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A29400B Datasheet(HTML) 13 Page - AMIC Technology

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A29400B Series
PRELIMINARY
(June, 2016, Version 0.0)
12
AMIC Technology, Corp.
Table 5. A29400B Command Definitions
Bus Cycles (Notes 2 - 4)
First
Second
Third
Fourth
Fifth
Sixth
Command
Sequence
(Note 1)
Addr Data
Addr Data
Addr Data Addr
Data
Addr Data Addr Data
Read (Notes 5, 6)
1
RA
RD
Reset (Note 6)
1
XXX
F0
Word
555
2AA
555
Manufacturer ID
Byte
4
AAA
AA
555
55
AAA
90
X00
37
Word
555
2AA
555
X01
B3B0
Device ID,
Top Boot Block
Byte
4
AAA
AA
555
55
AAA
90
X02
B0
Word
555
2AA
555
X01
B331
Device ID,
Bottom Boot Block
Byte
4
AAA
AA
555
55
AAA
90
X02
31
Word
555
2AA
555
X03
Continuation ID
Byte
4
AAA
AA
555
55
AAA
90
X06
7F
XX00
Word
555
2AA
555
(SA)
X02
XX01
00
Sector Protect Verify
(Note 8)
Byte
4
AAA
AA
555
55
AAA
90
(SA)
X04
01
Word
555
2AA
555
Program
Byte
4
AAA
AA
555
55
AAA
A0
PA
PD
Word
555
2AA
555
555
2AA
555
Chip Erase
Byte
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Word
555
2AA
555
555
2AA
Sector Erase
Byte
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Erase Suspend (Note 9)
1
XXX
B0
Erase Resume (Note 10)
1
XXX
30
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the
WE or CE pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of
WE or CE pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A12 select a unique sector.
Note:
1.
See Table 1 for description of bus operations.
2.
All values are in hexadecimal.
3.
Except when reading array or autoselect data, all bus cycles are write operation.
4.
Address bits A17 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
5.
No unlock or command cycles required when reading array data.
6.
The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high
(while the device is providing status data).
7.
The fourth cycle of the autoselect command sequence is a read cycle.
8.
The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more information.
9.
The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
10. The Erase Resume command is valid only during the Erase Suspend mode.



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