®

INA105

3

PIN CONFIGURATIONS

Top View

TO-99

INA105AM

INA105BM

NOTE: (1) Performance grade identifier box for small outline surface mount.

Blank indicates K grade. Part is marked INA105U.

Ref

–In

+In

V–

No Internal Connection

V+

Output

Sense

1

2

3

4

8

7

6

5

(1)

8

7

6

2

1

3

4

5

Tab

No Internal

Connection

Output

V+

V–

Sense

Ref

–In

+In

Case internally connected to V–. Make no connection.

Top View

DIP/SOIC

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

ABSOLUTE MAXIMUM RATINGS

Supply ................................................................................................

±18V

Input Voltage Range ............................................................................

±V

S

Operating Temperature Range: M .................................. –55

°C to +125°C

P, U ................................ –40

°C to +85°C

Storage Temperature Range: M ..................................... –65

°C to +150°C

P, U ................................. –40

°C to +125°C

Lead Temperature (soldering, 10s) M, P ....................................... +300

°C

Wave Soldering (3s, max) U .......................................................... +260

°C

Output Short Circuit to Common .............................................. Continuous

PACKAGE

DRAWING

TEMPERATURE

PRODUCT

PACKAGE

RANGE

INA105AM

TO-99 Metal

001

–40

°C to +85°C

INA105BM

TO-99 Metal

001

–40

°C to +85°C

INA105KP

8-Pin Plastic DIP

006

–40

°C to +85°C

INA105KU

8-Pin SOIC

182

–40

°C to +85°C

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

PACKAGE/ORDERING INFORMATION