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CY2280 Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # CY2280
Description  100-MHz Pentium II Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs
PDF  12 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2280 Datasheet(HTML) 1 Page - Cypress Semiconductor

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100-MHz Pentium® II Clock Synthesizer/Driver with
Spread Spectrum for Mobile or Desktop PCs
CY2280
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-07207 Rev. *A
Revised December 08, 2002
0
Features
• Mixed 2.5V and 3.3V operation
• Clock solution for Pentium® II, and other similar pro-
cessor-based motherboards
— Four 2.5V CPU clocks up to 100 MHz
— Eight 3.3V sync. PCI clocks, one free-running
— Two 3.3V 48-MHz USB clocks
— Three 3.3V Ref. clocks at 14.318 MHz
— Two 2.5V APIC clocks at 14.318 MHz or PCI/2
• EMI control
— Spread spectrum clocking
— Factory-EPROM programmable spread spectrum
margin
— Factory-EPROM programmable output drive and
slew rate
• Factory-EPROM programmable CPU clock frequencies
for custom configurations
• Available in space-saving 48-pin SSOP package
Functional Description
The CY2280 is a Spread Spectrum clock synthesizer/driver for
a Pentium II, or other similar processor-based PC requiring
100-MHz support. All of the required system clocks are provid-
ed in a space-saving 48-pin SSOP package. The CY2280 can
be used with the CY231x for a total solution for systems with
SDRAM.
The CY2280 provides the option of spread spectrum clocking
on the CPU and PCI clocks for reduced EMI. A downspread
percentage is introduced when the SEL_SS input is asserted.
The device can be run without spread spectrum when the
SEL_SS input is deasserted. The percentage of spreading is
EPROM-programmable to optimize EMI-reduction.
The CY2280 has power-down, CPU stop, and PCI stop pins
for power management control. The signals are synchronized
on-chip, and ensure glitch-free transitions on the outputs.
When the CPU_STOP input is asserted, the CPU clock out-
puts are driven LOW. When the PCI_STOP input is asserted,
the PCI clock outputs (except the free-running PCI clock) are
driven LOW. When the PWR_DWN pin is asserted, the refer-
ence oscillator and PLLs are shut down, and all outputs are
driven LOW.
CY2280 Selector Guide
CY2280 Configuration Options
Clock Outputs
–1
–11S
–21S
CPU (66.6, 100 MHz)
4
4
4
PCI (CPU/2, CPU/3)
8
8
8
USB (48 MHz)
2
2
2
APIC (14.318 MHz)
2
2
—
APIC (PCI/2)
——
2
Reference (14.318 MHz)
3
3
3
CPU-PCI delay
1.5
−4.0 ns
1.5
−4.0 ns
1.5
−4.0 ns
CPU-APIC delay
——
2.0–4.5 ns
Spread Spectrum (Downspread)
N/A
−0.6%
−0.6%
Pentium is a registered trademark of Intel Corporation.
Logic Block Diagram
EPROM
XTALOUT
XTALIN
APIC [0:1]
14.318
MHz
OSC.
SEL0
VDDAPIC
CPU
PLL
SEL100
Delay
REF [0-2]
CPUCLK [0-3]
VDDCPU
PCI [1-7]
PCICLK_F
STOP
STOP
LOGIC
LOGIC
SEL1
USBCLK [0:1]
SYS PLL
CPU_STOP
PWR_DWN
Divider
PCI_STOP
VDDPCI
VDDPCI
VDDREF
VDDUSB
-1
-2
SEL_SS


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