DS2770AESLASHT datasheet(7/27 Pages) DALLAS

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DS2770

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After initiation and clearing of the above conditions, fast charging begins with the CC pin driven low.

During fast charging, CC remains low, except for periodic testing of premature charge source removal in

which CC is driven high for approximately 27

ms every 55ms. As long as the charge source remains

connected and the temperature remains in the valid range, charging will proceed per the method selected

by the CTYPE bit. If the charge source is removed or the Stop Charge command [BEh] is issued, CC is

driven high and charging must be reinitiated by one of the two charge initiation methods described

previously. Charging will also be stopped if the DQ line is low for >2s and the CINI bit is set to 0.

Assuming any previous charge status has been cleared, a “charge in progress” status is indicated during

fast charging with (0, 1) values, respectively, in the CSTAT1 and CSTAT0 bits of the Status Register.

Upon charge completion according to the method selected with the CTYPE bit, or completion due to

either of the secondary methods, pin CC will return to the high state, and a charge done condition will be

flagged with (1, 1) values in the CSTAT1 and CSTAT0 bits of the Status Register. Note that the charge

done status is latched and must be cleared by a write of any value to the Status Register. Once charging

has been completed or aborted, the DS2770 may either enter the Sleep Mode or remain active, depending

on the state of the PMOD bit described previously in the Power Modes section.

RECHARGEABLE LITHIUM CHARGER OPERATION

Fast charging of lithium cell types is performed in two distinct regions. The bulk charge region delivers

most of the charge to the cell by gating current from the charge source while the battery voltage is below

the charge voltage threshold, VCV. The CC pin remains low, driving a PNP or P-channel MOSFET

switch. When the battery voltage reaches VCV, the pulse region begins in which a pulse-charge technique

is employed that allows CC to remain low for a delay period of tVCV (875ms) after which CC is driven

high. When the battery voltage decays below VCV, CC is again driven low and the cycle is repeated. The

pulse region of charge continues with the CC duty cycle slowly changing. Eventually, the battery voltage

decay time, and thus the CC high time, becomes longer than 13.125s, and charge is terminated. The

charge decay time limit, tCD, includes one 875ms period of CC low and 15 periods high for a total time of

14s. The average charge rate at termination is 1/16 of the rate set by the charge source. See Figure 3 for

an illustration of the tCD decay method. See the Secondary Charge Termination section for the secondary

termination means based on time or temperature included for increased safety.

DS2770AE/T Datasheet(PDF) 7 Page - Dallas Semiconductor