| Electronic Components Datasheet Search |
|
LT3461 Datasheet(PDF) 4 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LT3461 Datasheet(HTML) 4 Page - Linear Technology |
|
4 / 8 page ![]() LT3461/LT3461A 4 3461af OPERATIO Figure 2. Suggested Layout R2 R1 GND C3 L1 C1 VOUT VIN SHUTDOWN C2 3461a F03 The LT3461/LT3461A uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the block diagram in Figure 1. At the start of each oscillator cycle, the SR latch is set, which turns on the power switch Q1. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM compara- tor A2. When this voltage exceeds the level at the negative input of A2, the SR latch is reset turning off the power switch. The level at the negative input of A2 is set by the error amplifier A1, and is simply an amplified version of the difference between the feedback voltage and the reference voltage of 1.255V. In this manner, the error amplifier sets the correct peak current level to keep the output in regulation. If the error amplifier’s output in- creases, more current is delivered to the output; if it decreases, less current is delivered. Layout Hints The high speed operation of the LT3461/LT3461A de- mands careful attention to board layout. You will not get advertised performance with careless layout. Figure 2 shows the recommended component placement. BLOCK DIAGRA – + – + – + 6 1 3 2 ∑ VOUT VOUT R1 (EXTERNAL) R2 (EXTERNAL) RS (EXTERNAL) CS (EXTERNAL) FB SHUTDOWN SHDN RAMP GENERATOR 1.255V REFERENCE 3MHz* OSCILLATOR R S Q 4 A1 A2 COMPARATOR DRIVER RC CC SW Q1 0.1Ω GND VIN FB 3461a F02 RS, CS OPTIONAL SOFT-START COMPONENTS 5 *LT3461 IS 1.3MHz Figure 1. Block Diagram PI FU CTIO S SW (Pin 1): Switch Pin. Connect inductor here. Minimize trace at this pin to reduce EMI. GND (Pin 2): Ground Pin. Tie directly to local ground plane. FB (Pin 3): Feedback Pin. Reference voltage is 1.255V. Connect resistor divider tap here. Minimize trace area at FB. Set VOUT according to VOUT = 1.255V (1 + R1/R2). SHDN (Pin 4): Shutdown Pin. Tie to 1.5V or higher to enable device; 0.4V or less to disable device. Also func- tions as soft-start. Use RC filter (47k, 47nF typ) as shown in Figure 1. VOUT (Pin 5): Output Pin. Connect to resistor divider. Put capacitor close to pin and close to GND plane. VIN (Pin 6): Input Supply Pin. Must be locally bypassed. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |