Electronic Components Datasheet Search
  English  ▼

X  

PC87365 Datasheet(PDF) 195 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87365
Description  128-Pin LPC SuperI/O with System Hardware Monitoring
PDF  215 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87365 Datasheet(HTML) 195 Page - National Semiconductor (TI)

Back Button PC87365 Datasheet HTML 191Page - National Semiconductor (TI) PC87365 Datasheet HTML 192Page - National Semiconductor (TI) PC87365 Datasheet HTML 193Page - National Semiconductor (TI) PC87365 Datasheet HTML 194Page - National Semiconductor (TI) PC87365 Datasheet HTML 195Page - National Semiconductor (TI) PC87365 Datasheet HTML 196Page - National Semiconductor (TI) PC87365 Datasheet HTML 197Page - National Semiconductor (TI) PC87365 Datasheet HTML 198Page - National Semiconductor (TI) PC87365 Datasheet HTML 199Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 195 / 215 page
background image
11.0 Legacy Functional Blocks (Continued)
195
www.national.com
11.5 IR FUNCTIONALITY (SP2)
11.5.1
General Description
This section describes the IR support registers of Serial Port 2 (SP2). The UART support registers for both SP1 and SP2
are described in Section 11.4.
The IR functional block provides advanced, versatile serial communications features with IR capabilities.
SP2 supports also two DMA channels; the functional block can use either one or both of them. One channel is required for
IR-based applications because IR communication works in half duplex fashion. Two channels would normally be needed to
handle high-speed full-duplex UART based applications.
11.5.2
IR Mode Register Bank Overview
Eight register banks, each containing eight registers, control SP2 operation. Banks 0-3 are used to control both UART and
IR modes of operation; banks 4-7 are used to control and configure the IR modes of operation only. All registers use the
same 8-byte address space to indicate offsets 00h through 07h. The BSR register selects the active bank and is common
to all banks. See Figure 40.
Figure 40. SP2 Register Bank Architecture
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
Offset 07h
Offset 06h
Offset 05h
Offset 04h
LCR/BSR
Offset 02h
Offset 01h
Offset 00h
Common
Register
Throughout
All Banks
IR Special Banks
(Banks 4-7)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com