| Electronic Components Datasheet Search |
|
PCF8831 Datasheet(PDF) 5 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCF8831 Datasheet(HTML) 5 Page - NXP Semiconductors |
|
5 / 28 page ![]() 2002 Aug 14 5 Philips Semiconductors Preliminary specification STN RGB - 160 output row driver PCF8831 6 PINNING Note 1. Dummy pads are located at positions 1 (slanted), 162 to 186 and 243 to 272. SYMBOL PAD(1) TYPE DESCRIPTION R159 to R0 2 to 161 O LCD row outputs RCLK 187 I clock input to the shift register; data is transmitted with the positive clock edge; connect RCLK to the RCLK output of the PCF8832 column driver RP 188 I row pulse input; driven by the RP output of the PCF8832 column driver FI 189 I frame inversion input; controls frame and N-line inversion; FI is synchronized internally by the rising edge of RCLK; FI can change only when RP changes; connect FI to the FI output of the PCF8832 column driver SVM 190 I input that switches the non-selected level (VM or VSS, depending on ROWRES2) to all row outputs; connect SVM to the SVM output of the PCF8832 column driver ROWRES1 191 I external reset input 1; when LOW, the shift register is reset at the next rising edge of RCLK and all outputs (R0 to R159) go to their non-selected level; connect ROWRES1 to the RESROW output of the PCF8832 column driver ROWRES2 192 I external reset input 2; when LOW, the non-selected level goes to VSS; when HIGH, the non-selected level goes to VM; connect ROWREST to the RESROW output of the PCF8832 column driver R1F 193 I inputs R1F (row block 1 first), SW1 (swap row block 1) and SW2 (swap row block 2) control the shift direction through the register and the order of the register; see Table 1; connect to the corresponding signal outputs of the PCF8832 column driver, or connect directly to VDD or VSS as required by the display module configuration SW1 194 I SW2 195 I T1 to T5 196 to 200 I test inputs; connect to VSS for normal operation VSS 201 to 207 PS logic power supply, negative; normally connected to system ground VDD 208 to 214 PS logic power supply, positive; 2.4 to 3.5 V referred to VSS VM 215 to 221 PS MID-level LCD driving voltage; level is between VH and VL; output at rows for non-selecting periods when ROWRES2 is HIGH; 1.25 to 2.0 V referred to VSS VMH 222 to 228 PS auxiliary supply voltage for row switch; higher than VM; limited at VL +40V VH 229 to 235 PS HIGH-level LCD driving voltage; top level of the positive selecting pulse of row outputs VL 236 to 242 PS LOW-level LCD driving voltage; bottom level of the negative selecting pulse of row outputs |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |