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SI786CSG Datasheet(PDF) 14 Page - Vishay Siliconix |
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SI786CSG Datasheet(HTML) 14 Page - Vishay Siliconix |
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14 / 14 page ![]() Si786 Vishay Siliconix www.vishay.com 14 Document Number: 70189 S-40807—Rev. J, 26-Apr-04 Both minimum capacitance and maximum ESR requirements must be met. In order to get the low ESR, a capacitance value of two to three times greater than the required minimum may be necessary. The equation for output ripple in continuous current mode is: VOUT(RPL) + ILPP(MAX) ESRCF ) 1 2 P xf CF The equations for capacitive and resistive components of the ripple in pulse-skipping mode are: VOUT(RPL)(C) + if VOUT(RPL)(R) < 0.5 VOUT(RPL)(C), then VOUT(RPL) = VOUT(RPL)(C), otherwise, VOUT(RPL) = 0.5 VOUT(RPL)(C) + VOUT(RPL)(R). The total ripple, VOUT(RPL), can be approximated as follows: (4) 10–4 (L) RCS2 CF 1 VOUT ) 1 VIN–VOUT VOUT(RPL)(R) + (0.02) ESRCF RCS Lower Voltage Input The application circuit shown here can be easily modified to work with 5.5-V to 12-V input voltages. Oscillation frequency should be set at 200 kHz and increase the output capacitance to 660 mF on the 5-V output to maintain stable performance up to 2 A of load current. Operation on the 3.3-V supply will not be affected by this reduced input voltage. |
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