LF198/LF298/LF398, LF198A/LF398A

Monolithic Sample-and-Hold Circuits

General Description

The LF198/LF298/LF398 are monolithic sample-and-hold

circuits which utilize BI-FET technology to obtain ultra-high

dc accuracy with fast acquisition of signal and low droop

rate. Operating as a unity gain follower, dc gain accuracy is

0.002% typical and acquisition time is as low as 6 µs to

0.01%. A bipolar input stage is used to achieve low offset

voltage and wide bandwidth. Input offset adjust is accom-

plished with a single pin, and does not degrade input offset

drift. The wide bandwidth allows the LF198 to be included in-

side the feedback loop of 1 MHz op amps without having sta-

bility problems. Input impedance of 10

10

Ω allows high

source impedances to be used without degrading accuracy.

P-channel junction FET’s are combined with bipolar devices

in the output amplifier to give droop rates as low as 5 mV/min

witha1µF hold capacitor. The JFET’s have much lower

noise than MOS devices used in previous designs and do

not exhibit high temperature instabilities. The overall design

guarantees no feed-through from input to output in the hold

mode, even for input signals equal to the supply voltages.

Features

n

n

Less than 10 µs acquisition time

n

TTL, PMOS, CMOS compatible logic input

n

0.5 mV typical hold step at C

n

Low input offset

n

0.002% gain accuracy

n

Low output noise in hold mode

n

Input characteristics do not change during hold mode

n

High supply rejection ratio in sample or hold

n

Wide bandwidth

n

Space qualified, JM38510

Logic inputs on the LF198 are fully differential with low input

current, allowing direct connection to TTL, PMOS, and

CMOS. Differential threshold is 1.4V. The LF198 will operate

An “A” version is available with tightened electrical

specifications.

Typical Connection and Performance Curve

Functional Diagram

DS005692-32

Acquisition Time

DS005692-16

DS005692-1

July 2000

© 2000 National Semiconductor Corporation

DS005692

www.national.com