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TPS2377D Datasheet(PDF) 13 Page - Texas Instruments |
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TPS2377D Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 21 page ![]() www.ti.com UNDERVOLTAGE LOCKOUT (UVLO) PROGRAMMABLE INRUSH CURRENT LIMIT AND FIXED OPERATIONAL CURRENT LIMIT TPS2375 TPS2376 TPS2377 SLVS525A – APRIL 2004 – REVISED SEPTEMBER 2004 APPLICATION INFORMATION (continued) The TPS2375 incorporates an undervoltage lockout (UVLO) circuit that monitors line voltage to determine when to apply power to the downstream load and allow the PD to power up. The IEEE 802.3af specification dictates a maximum PD turnon voltage of 42 V and a minimum turnoff voltage of 30 V (Figure 19). The IEEE 802.3af standard assumes an 8-V drop in the cabling based on a 20- Ω feed resistance and a 400-mA maximum inrush limit. Because the minimum PSE output voltage is 44 V, the PD must continue to operate properly with input voltages as low as 36 V. The TPS2375 UVLO limits are designed to meet the turnon, turnoff, and hysteresis requirements. Various legacy PSE systems in the field do not meet the minimum output voltage of 44 V. The TPS2377 UVLO limits are designed to support these systems with a lower turnon voltage and smaller hysteresis. Although the TPS2377 works with compliant PSEs, it could potentially exhibit startup instabilities if the PSE output voltage rises slowly. The TPS2375 is recommended for applications with compliant PSEs. In order to provide flexibility for noncompliant designs, the TPS2376 allows the designer to program the turnon thresholds with a resistor divider. The hysteresis of the TPS2376, measured as a percentage of the turnon voltage, is similar to that of the TPS2375. To use the TPS2376, connect a resistor divider between VDD and VSS with the tap connected to the UVLO pin. The total divider resistance appears in parallel with the R(DET), and the combination of the two should equal 24.9 k Ω. The divider ratio should be chosen to obtain 2.5 V at the UVLO pin when V(VDD) is at the desired turnon voltage. The TPS2375 uses the UVLO function to control the load through an onboard MOSFET switch. Figure 19 graphically shows the relationships of the UVLO thresholds defined in the Electrical Characteristics section to the TPS2375 operational states. Inrush limiting is beneficial for a number of reasons. First, it provides a mechanism to keep the inrush current below the 400 mA, 50 ms, maximum inrush allowed by the standard. Second, by reducing the level of the current limit below the PSE operational limit, which can be as low as the classification power divided by the PSE voltage, it allows an arbitrarily large bulk capacitor to be charged. Third, some legacy PSEs may not tolerate large inrush currents while powering their outputs up. The TPS2375 operational current limit protects the internal power switch from instantaneous output faults and current surges. The minimum operational current limit level of 405 mA is above the maximum PSE output current limit of 400 mA. This current limit allows the PD to draw the maximum available power and also allows the PSE to detect fault conditions. The TPS2375 incorporates a state machine that controls the inrush and operational current limit states. When V(VDD) is below the lower UVLO threshold, the current limit state machine is reset. In this condition, the RTN pin is high impedance, and at V(VDD) once the output capacitor is discharged by the downstream circuits. When V(VDD) rises above the UVLO turnon threshold, the TPS2375 enables the internal power MOSFET with the current limit set to the programmed inrush value. The load capacitor charges and the RTN pin voltage falls from V(VDD) to nearly V(VSS). Once the inrush current falls about 10% below the programmed limit, the current limit switches to the internal 450-mA operational level after a 150- µs delay. This switchover can be seen in the operation of PG, which goes active (open drain) after inrush terminates as seen in Figure 1. The internal power MOSFET is disabled if the input voltage drops below the lower UVLO threshold. When in the operating current-limit state, a fault on the output or a large input transient can cause the internal MOSFET to limit current. The RTN voltage rises above its normal operating level of less than 0.5 V while in current-limit state. If V(RTN) rises above 10 V for more than 150 µs, the MOSFET is latched off. The PD input voltage must drop below the lower UVLO threshold to clear this latch. If the RTN voltage does not exceed 10 V while in current-limit state, but the condition persists long enough to overheat the TPS2375, the thermal limit circuit activates, as described in the thermal protection section. Practical values of R(ILIM) lie between 62.5 kΩ and 500 kΩ. The pin must not be left open. An inrush level of 140 mA, set by an R(ILIM) of 178 kΩ, should be used with TPS2377 applications for compatibility with legacy systems. This same inrush current level suffices for many TPS2375 applications. 13 |
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