BelaSigna 300 with AfterMaster HD

www.onsemi.com

2

Figures and Data

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter

Min

Max

Unit

Voltage at any input pin

−0.3

2.0

V

Operating supply voltage (Note 1)

0.9

2.0

V

Operating temperature range (Note 2)

−40

85

°C

Storage temperature range

−55

85

°C

Caution: Class 2 ESD Sensitivity, JESD22−A114−B (2000 V)

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Functional operation only guaranteed below 0

°C for digital core (VDDC) and system voltages above 1.0 V.

2. Parameters may exceed listed tolerances when out of the temperature range 0 to 50

°C.

Electrical Performance Specifications

The tests were performed at 20

°C with a clean 1.8 V supply voltage. BelaSigna 300 AM was running in high voltage mode (VDDC

= 1.8 V unless otherwise noted). The system clock (SYS_CLK) was generated externally at 38 MHz.

Parameters marked as screened are tested on each chip. Other parameters are qualified but not tested on every part.

Table 2. ELECTRICAL SPECIFICATIONS

Description

Symbol

Conditions

Min

Typ

Max

Units

Screened

OVERALL

Supply voltage

1.8

2.0

V

√

Current consumption

AfterMaster HD @ Fs= 48 kHz

−

8

−

mA

√

Fs = 44.1 kHz

−

7

−

mA

√

Fs =16 kHz

−

3

−

mA

√

Fs = 8 kHz

−

2

−

mA

VREG (1

mF External Capacitor) Measurement at VDDC = 1.0 V, Low voltage mode

Regulated voltage output

0.95

1.00

1.05

V

√

Regulator PSRR

1 kHz

50

55

−

dB

Load current

−

−

2

mA

Load regulation

−

6.1

6.5

mV/mA

√

Line regulation

−

2

5

mV/V

VDBL (1

mF External Capacitor) Measurement at VDDC = 1.0 V, Low voltage mode

Regulated doubled voltage

output

VDBL

1.9

2.0

2.1

V

√

Regulator PSRR

1 kHz

35

41

−

dB

Load current

−

−

2.5

mA

Load regulation

−

7

10

mV/mA

√

Line regulation

−

10

20

mV/V

VDDC (1

mF External Capacitor) Measurement at VDDC = 1.0 V, Low voltage mode

Digital supply voltage output

VDDC

Configured by a control register

0.79

0.95

1.25

V

√

VDDC output level adjustment

27

29

31

mV

Regulator PSRR

1 kHz

25

25.5

26

dB

Load current

−

−

3.5

mA

Load regulation

−

3

12

mV/mA

√

Line regulation

−

3

8

mV/V