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RT1710 Datasheet(PDF) 2 Page - Richtek Technology Corporation

Part # RT1710
Description  Cable ID for USB Type-C Cables
PDF  14 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT1710 Datasheet(HTML) 2 Page - Richtek Technology Corporation

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RT1710
2
DS1710-00 May 2016
www.richtek.com
©
Copyright
2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Function Block Diagram
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
VCON1
The Input Pin Supplied from VCONN.
2
CCIN
Configuration Channel Pin Used in the Discovery, Configuration and Management
of Connections.
3
VCON2
The Input Pin Supplied from Another Side VCONN.
4
GND
Ground.
5
SDA
This Pin is Only Used for Debug. Please connect it to ground.
6
SCL
This Pin is Only Used for Debug. Please connect it to ground.
7
NC(DG1)
No Internal Connection.
8
NC(DG0)
No Internal Connection.
9
(Exposed Pad)
GND
Power Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Operation
RT1710 is a Type-C cable ID for active and passive cables.
All USB Full-Featured Type-C cables shall be electronically
marked. Electronically marked cables shall support USB
Power Delivery Structured VDM Discover Identity command
directed to SOP'. This provides a method to determine
the characteristics of the cable, e.g. its current carrying
capability, its performance, vendor identification, etc. This
may be referred to as the USB Type-C Cable ID function.
An electronically marked cable incorporates electronics
that require VCONN, although VBUS or another source may
be used. Electronically marked cables that do not
incorporate data bus signal conditioning circuits shall
consume no more than 70mW from VCONN. During USB
suspend, electronically marked cables shall not draw more
than 7.5mA from VCONN.
VCON1
VCON2
CCIN
GND
SCL
SDA
I2C Controller
Voltage
Regulator
MTP
Internal Bus
Cable Policy
Engine
Register Block
Detection
MUX Control
Protocol Layer
USB PD Physical
Layer
DG0
DG1
RA
RA



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