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P87LPC760 Datasheet(PDF) 35 Page - NXP Semiconductors |
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P87LPC760 Datasheet(HTML) 35 Page - NXP Semiconductors |
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35 / 56 page ![]() Philips Semiconductors Preliminary data P87LPC760 Low power, low price, low pin count (14 pin) microcontroller with 1 kbyte OTP 2002 Mar 07 32 BIT SYMBOL FUNCTION SCON.7 FE Framing Error. This bit is set by the UART receiver when an invalid stop bit is detected. Must be cleared by software. The SMOD0 bit in the PCON register must be 1 for this bit to be accessible. See SM0 bit below. SCON.7 SM0 With SM1, defines the serial port mode. The SMOD0 bit in the PCON register must be 0 for this bit to be accessible. See FE bit above. SCON. 6 SM1 With SM0, defines the serial port mode (see table below). SM0, SM1 UART Mode Baud Rate 0 0 0: shift register CPU clock/6 0 1 1: 8-bit UART Variable (see text) 1 0 2: 9-bit UART CPU clock/32 or CPU clock/16 1 1 3: 9-bit UART Variable (see text) SCON.5 SM2 Enables the multiprocessor communication feature in Modes 2 and 3. In Mode 2 or 3, if SM2 is set to 1, then Rl will not be activated if the received 9th data bit (RB8) is 0. In Mode 1, if SM2=1 then RI will not be activated if a valid stop bit was not received. In Mode 0, SM2 should be 0. SCON.4 REN Enables serial reception. Set by software to enable reception. Clear by software to disable reception. SCON.3 TB8 The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired. SCON.2 RB8 In Modes 2 and 3, is the 9th data bit that was received. In Mode 1, it SM2=0, RB8 is the stop bit that was received. In Mode 0, RB8 is not used. SCON.1 TI Transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of the stop bit in the other modes, in any serial transmission. Must be cleared by software. SCON.0 RI Receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the stop bit time in the other modes, in any serial reception (except see SM2). Must be cleared by software. RI SU01550 TI RB8 TB8 REN SM2 SM1 SM0/FE 0 1 2 3 4 5 6 7 SCON Reset Value: 00h Bit Addressable Address: 98h Figure 31. Serial Port Control Register (SCON) Baud Rates The baud rate in Mode 0 is fixed: Mode 0 Baud Rate = CPU clock/6. The baud rate in Mode 2 depends on the value of bit SMOD1 in Special Function Register PCON. If SMOD1 = 0 (which is the value on reset), the baud rate is 1/32 of the CPU clock frequency. If SMOD1 = 1, the baud rate is 1/16 of the CPU clock frequency. Mode 2 Baud Rate + 1 ) SMOD1 32 x CPU clock frequency Using Timer 1 to Generate Baud Rates When Timer 1 is used as the baud rate generator, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate and the value of SMOD1. The Timer 1 interrupt should be disabled in this application. The Timer itself can be configured for either “timer” or “counter” operation, and in any of its 3 running modes. In the most typical applications, it is configured for “timer” operation, in the auto-reload mode (high nibble of TMOD = 0010b). In that case the baud rate is given by the formula: Mode 1, 3 Baud Rate + CPU clock frequency 192 (or96ifSMOD1 + 1) 256 * (TH1) Tables 6 and 7 list various commonly used baud rates and how they can be obtained using Timer 1 as the baud rate generator. |
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