LM5161 datasheet(21/37 Pages) TI1

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UV2

IN, UVLO(rising)

UVLO(TH)

UV1

IN(HYS)

UVLO(HYS)

UV2

Startup

LM5161-Q1

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SNVSAF9 – AUGUST 2016

Product Folder Links: LM5161-Q1

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CIN (C4, C6) supplies most of the switch current during the ON-time to limit the voltage ripple at the VIN pin. At

maximum load current, when the buck switch turns on, the current into the VIN pin quickly increases to the valley

current of the inductor ripple and then ramps up to the peak of the inductor ripple during the ON-time of the high-

side FET. The average current during the ON-time is the output load current. For a worst-case calculation, CIN

must supply this average load current during the maximum ON-time, without letting the voltage at VIN drop more

than the desired input ripple. For this design, the input voltage drop is limited to 0.5 V and the value of CIN is

calculated using Equation 15.

Based on Equation 15, the value of the input capacitor is calculated to be approximately 1.68 µF at D = 0.5.

Taking into account the decrease in capacitance over an applied voltage, two standard value ceramic capacitors

of 2.2 μF are selected for C4 and C6. The input capacitors should be rated for the maximum input voltage under

all operating and transient conditions. A 100-V, X7R dielectric was selected for this design.

A third input capacitor C5 is needed in this design as a bypass path for the high frequency component of the

input switching current. The value of C5 is 0.1 μF and this bypass capacitor must be placed directly across VIN

and PGND (pin 3 and 2) near the IC. The CIN values and location are critical to reducing switching noise and

transients.

8.2.1.2.8

Soft-Start Capacitor Selection

The capacitor at the SS pin determines the soft-start time, that is the time for the output voltage to reach its final

steady state value. The capacitor value is determined from Equation 16:

(16)

With C9 (CSS) set at 22 nF and the Vss = 2 V, ISS = 10 µA, the TStartup should measure approximately 4 ms.

8.2.1.2.9

EN/UVLO Resistor Selection

The UVLO resistors R3 (RUV2) and R9 (RUV1) set the input undervoltage lockout threshold and hysteresis

according to Equation 17 and Equation 18:

(17)

and,

(18)

From the Electrical Characteristics, IUVLO(HYS) = 20 μA (typical). To design for VIN rising threshold (VIN, UVLO(rising))

at 15 V and EN/UVLO hysteresis of 1.5 V, Equation 17 and Equation 18 yield RUV1 = 6.81 kΩ and RUV2 = 75 kΩ .

Selecting 1% standard value of R9 (RUV1) = 6.81 kΩ and R3 (RUV2) = 75 kΩ results in UVLO threshold (rising)

and hysteresis of 14.9 V and 1.5 V respectively.

LM5161 Datasheet(PDF) 21 Page - Texas Instruments

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