MIC2128 datasheet(23/32 Pages) MICROCHIP

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 2016 Microchip Technology Inc.

DS20005620A-page 23

MIC2128

EQUATION 5-23:

The input capacitor should be rated for ripple current

rating and voltage rating. The RMS value of input

capacitor current is determined at the maximum output

current. The RMS current rating of the input capacitor

should be greater than or equal to the input capacitor

RMS current calculated using the Equation 5-24.

EQUATION 5-24:

The power dissipated in the input capacitor is

calculated using Equation 5-25.

EQUATION 5-25:

5.8

Ripple Injection

The minimum recommended ripple at the FB pin for

proper operation of the MIC2128 error amplifier and

comparator is 20 mV. However, the output voltage

ripple is generally designed as 1% to 2% of the output

voltage. For low output voltages, such as a 1V, the

output voltage ripple is only 10 mV to 20 mV, and the

feedback voltage ripple is less than 20 mV. If the

feedback voltage ripple is so small that the gm amplifier

and comparator cannot sense it, then the MIC2128

loses control and the output voltage is not regulated. In

order to have sufficient VFB ripple, ripple injection

method should be applied for low output voltage ripple

applications.

The applications are divided into three situations

according to the amount of the feedback voltage ripple:

Enough ripple at the feedback due to the large

ESR of the output capacitor (Figure 5-5). The

converter is stable without any additional ripple

injection at the FB node. The feedback voltage

ripple is given by Equation 5-26.

EQUATION 5-26:

IL_PP is the peak-to-peak value of the inductor current

ripple.

FIGURE 5-5:

Enough Ripple at FB.

Inadequate ripple at the feedback voltage due to

the small ESR of the output capacitor.

The output voltage ripple can be fed into the FB pin

through a feed forward capacitor, CFF in this case, as

shown in Figure 5-6. The typical CFF value is between

1 nF and 100 nF. With the feed forward capacitor, the

feedback voltage ripple is very close to the output volt-

age ripple which is shown in Equation 5-27.

EQUATION 5-27:

FIGURE 5-6:

Inadequate Ripple at FB.

Virtually no ripple at the FB pin voltage due to

the very-low ESR of the output capacitors:

In this case, additional ripple can be injected into the

FB pin from the switching node SW via a resistor RINJ

and a capacitor CINJ, as shown in Figure 5-7.

LOAD

–





 f





 V

IN_C

-------------------------------------------------

ESR

C_IN

V

IN_ESR

L_PK

-----------------------

Where:

ILOAD

= Load Current

IL_PK

= Peak Inductor Current

VINC

= Input ripple due to capacitance

VINESR = Input ripple due to input capacitor ESR

= Power conversion efficiency

C_IN(RMS)

LOAD(MAX)

–





DISS(C_IN)

C_IN(RMS)



ESR

C_IN



V

FB PP



------------------

ESR

I

L_PP



MIC2128

COUT

ESR

V

FB PP



ESR

I

L_PP



MIC2128

COUT

ESR

CFF

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