MIC2128

DS20005620A-page 18

 2016 Microchip Technology Inc.

eight current limit events trigger the hiccup mode. Once

the controller enters into hiccup mode, it initiates a

soft-start sequence after a hiccup timeout of 4 ms

(typical). Both the high-side and low-side MOSFETs

are turned off during hiccup timeout. The hiccup

sequence including the soft start reduces the stress on

the switching FETs and protects the load and supply

from severe short conditions.

The current limit can be programmed by using the

following Equation 4-4.

EQUATION 4-4:

temperature, it is recommended to consider the

equation to avoid false current limiting due to increased

MOSFET junction temperature rise. It is also

recommended to connect SW pin directly to the drain

of the low-side MOSFET to accurately sense the

To improve the current limit variation, the MIC2128

a rate of 0.3 µA/°C when the MIC2128 junction

variation

of

external

low-side

MOSFET.

The

effectiveness of this method depends on the thermal

gradient between the MIC2128 and the external

low-side MOSFET. The lower the thermal gradient, the

better the current limit variation.

pin to PGND to filter the switch node ringing during the

Off-time allowing a better current sensing. The time

minimum off time.

4.4

Negative Current Limit

The MIC2128 implements negative current limit by

sensing the SW voltage when the low-side FET is ON.

If the SW node voltage exceeds 48 mV typical, the

device turns off the low-side FET for 500 ns. Negative

current limit value is shown in Equation 4-5.

EQUATION 4-5:

4.5

High-Side MOSFET Gate Drive

(DH)

The MIC2128's high-side drive circuit is designed to

switch an N-Channel external MOSFET. The MIC2128

Functional Block diagram shows a bootstrap diode

between PVDD and BST pins. This circuit supplies

energy to the high-side drive circuit. A low ESR ceramic

capacitor should be connected between BST and SW

pins (refer Typical Application Circuit).The capacitor

low-side MOSFET is on. When the high-side MOSFET

MOSFET on. A minimum of 0.1 µF low ESR ceramic

capacitor is recommended between BST and SW pins.

following Equation 4-6.

EQUATION 4-6:

A small resistor in series with CBST, can be used to

slow down the turn-on time of the high-side N-channel

MOSFET.

4.6

Low-Side MOSFET Gate Drive (DL)

The MIC2128's low-side drive circuit is designed to

switch an N-Channel external MOSFET. The internal

low-side MOSFET driver is powered by PVDD.

Connect a minimum of 4.7 µF low-ESR ceramic

capacitor to supply the transient gate current of the

external MOSFET.

4.7

Auxiliary Bootstrap LDO

(EXTVDD)

The MIC2128 features an auxiliary bootstrap LDO

which improves the system efficiency by supplying the

MIC2128 internal circuit bias power and gate drivers

from the converter output voltage. This LDO is enabled

when the voltage on the EXTVDD pin is above 4.6V

(typical) and at the same time the main LDO which

consumption.

R

CL

I

CLIM

PP

2

----------------

+





R

DS ON



V

OFFSET

+



I

CL

--------------------------------------------------------------------------------------------------

=

Where:

= Load current limit

= Inductor peak-to-peak ripple current

= Current-limit source current (96 µA typ)

I

NLIM

48mV

R

DS ON



--------------------

=

Where:

= Negative current limit

C

BST

Q

G_HS

BST

----------------

=

Where:

= High-side MOSFET total gate charge

= Drop across the CBST,

generally 50 mV to 100 mV