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UT621024 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part # UT621024
Description  128K X 8 BIT LOW POWER CMOS SRAM
PDF  12 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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UT621024 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers

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UTRON
UT621024
Rev. 1.5
128K X 8 BIT LOW POWER CMOS SRAM
_________________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80036
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
CAPACITANCE (TA=25℃, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Input Capacitance
CIN
-
8
pF
Input/Output Capacitance
CI/O
-
10
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
CL=100pF, IOH/IOL=-1mA/4mA
AC ELECTRICAL CHARACTERISTICS (VCC = 5V± 10% , TA = 0℃ to 70℃)
(1) READ CYCLE
PARAMETER
SYMBOL UT621024-35 UT621024-55 UT621024-70 UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
tRC
35
-
55
-
70
-
ns
Address Access Time
tAA
-
35
-
55
-
70
ns
Chip Enable Access Time
tACE1, tACE2
-
35
-
55
-
70
ns
Output Enable Access Time
tOE
-
25
-
30
-
35
ns
Chip Enable to Output in Low-Z
tCLZ1*, tCLZ2*
10
-
10
-
10
-
ns
Output Enable to Output in Low-Z
tOLZ*
5
-
5
-
5
-
ns
Chip Disable to Output in High-Z
tCHZ1*, tCHZ2*
-
25
-
30
-
35
ns
Output Disable to Output in High-Z tOHZ*
-
25
-
30
-
35
ns
Output Hold from Address Change tOH
5
-
5
-
5
-
ns
(2) WRITE CYCLE
PARAMETER
SYMBOL
UT621024-
35
UT621024-55
UT621024-70 UNIT
MIN.
MAX. MIN. MAX. MIN.
MAX.
Write Cycle Time
tWC
35
-
55
-
70
-
ns
Address Valid to End of Write
tAW
30
-
50
-
60
-
ns
Chip Enable to End of Write
tCW1, tCW2
30
-
50
-
60
-
ns
Address Set-up Time
tAS
0
-
0
-
0
-
ns
Write Pulse Width
tWP
25
-
40
-
45
-
ns
Write Recovery Time
tWR
0
-
0
-
0
-
ns
Data to Write Time Overlap
tDW
20
-
25
-
30
-
ns
Data Hold from End of Write-Time tDH
0
-
0
-
0
-
ns
Output Active from End of Write
tOW*
5
-
5
-
5
-
ns
Write to Output in High-Z
tWHZ*
-
15
-
20
-
25
ns
*These parameters are guaranteed by device characterization, but not production tested.



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