BH1721FVC

Technical Note

9/15

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2011.11 - Rev.B

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ex 4) LPF using CR is inserted between VCC and DVI.

This method has the possibility that the Reset section of turning on the power supply can not satisfied. Cannot be

satisfied. Please design the set considering the characteristic of the power supply enough.

◆

Notes when CR is inserted between VCC and DVI

※

Please note that there is a possibility that reset section ( 1µs ) can not be satisfied because the power supply is turned on when the rise time of VCC is slow

※

When VCC is turned off, the DVI voltage becomes higher than VCC voltage but IC destruction is not occred if recommended constant

( R1 = 1kΩ, C1 = 1µF ) is used.

※

Please note that there is a possibility that Reset section (1µsec) cannot be satisfied if wait time is not enough long after turning off VCC.

(It is necessary to consider DVI voltage level after turning off VCC.)

◆

Example of designing set when CR ( C = 1µF, R = 1kΩ ) is inserted between VCC and DVI with VCC=2.8V

①

The rise time to 0→2.4V of VCC must use the power supply of 100µs or less.

②

Please wait 25ms or more after VCC turn off ( VCC <= 0.05V ), because it is necessary to secure reset section

(1µs or more).

R1 : 1kΩ

C1 : 1µF

BH1721FVC

0.1µF

VCC SCL

SDA

DVI

GND

0.1µF

* Please do the application design to secure Reset section 1µs or more after the reclosing of the power supply.

Reset Section: 1µs or more

Rise time of power supply: 100µs or less

0.05V

Time to power supply reclosing: 25ms or more

0V

VCC

DVI

2.4V

0.4V

2.8V

0V

* Please do the application design to secure Reset section 1µs or more after the reclosing of the power supply.

Reset Section: 1µs or more

t1

VCC

DVI

2.4V

0.4V

0V

t2