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IRF7401 Datasheet(PDF) 20 Page - Analog Devices |
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IRF7401 Datasheet(HTML) 20 Page - Analog Devices |
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20 / 24 page ![]() REV. C –20– ADN8830 If the voltage at VSY drops below VX, Q1 is turned off and the VLIM pin will be set to 1.5 V, effectively setting the maximum voltage across the outputs to 0 V. The voltage divider for VX is calculated from Equation 43. Design Example 5 A maximum output current limit needs to be set at 1.5 A for a TEC with a maximum voltage rating of 2.5 V. The ADN8830 is powered from 5 V. The TEC resistance is estimated at 1.67 Ω and efficiency at 85%. Using Equation 43, the voltage drop across RS will be 8.8 mV when 1.5 A is delivered to the TEC. The trip voltage VX is set to 4.991 V with R3 = 178 Ω and R4 = 100 kΩ as shown in Figure 21. To set the output voltage limit to 2.5 V, the voltage at VLIMIT should be set to 0.875 V according to Equation 17. The C1 capacitor is added to smooth the voltage transitions at VLIM. Once an overcurrent condition is detected, the output voltage will turn down to 0 V within 30 ms. For a more exact measurement of the output current, place a sense resistor in series with the output load, as shown in Figure 23. The AD626 instrumentation amplifier is set for a gain of 100 with a reference voltage of 2.47 V from VREF. The output of the AD626 is equal to 100 × R S × I L and is fed to the AD8602, which is set up as a window comparator. With VX greater than VLO but less than VHI, VLIM will be pulled down to the volt- age at VLIMIT. Should VX fall outside the voltage window, VLIM will be pulled to 1.5 V as in Figure 21. The trip points should be set according to VHI VREF R I VLO VREF R I S LIMIT S LIMIT =+ × =× + 100 100 – – (44) AVDD Q1,Q2 FDG6303N OR EQUIVA- LENT 8 TO VREF 1nF AVDD TO OUT B RS 10m IL TO TEC VLIMIT (0V TO 1.5V) TO VLIM R2 1.47k R1 3.48k AVDD 200k 300k 300k 200k VX VLO AD8602 AD626 AVDD VHI Figure 23. High Accuracy Output Current Limit The upper and lower trip point voltages can be set independently, allowing different maximum output current limits depending on the direction of the current. The resistor divider for VHI and VLO is tapped to VREF to maintain window accuracy with any changes in VREF. Using the values from Figure 23 with a 5 V supply, the output current will not exceed 1.5 A in either direction. Adding the current sensing resistor will slightly reduce efficiency. The power dissipated by this resistor is D × ITEC2 × R S if the TEC is heating, or (1–D) × ITEC2 × R S if the TEC is cooling. Include this when calculating efficiency as described in the Calculating Power Dissipation and Efficiency section. 25mV/ C OUTOA ADT70 1k OUTIA –INOA 5.11k AGND 4.99k RGA RGB INST AMP –INIA +INIA +INOA R3 1k R3 82.5 IOUTB IOUTA RTD 1k R3 82.5 GND SENSE 5V NOTE: ADDITIONAL PINS OMITTED FOR CLARITY TO THERM_IN = 1V @ 25 C Figure 22. Using an RTD for Temperature Feedback to the ADN8830 |
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