PI2127 datasheet(12/19 Pages) VICOR

12 / 19 page

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Picor Corporation • picorpower.com

PI2127

Rev 1.3

Page 12 of 19

sourced from the load through the MOSFET.

Depending on the output impedance of the system

and the parasitic inductance, the reverse current in

the MOSFET may exceed the source pulsed current

rating (150A) just before the PI2127 MOSFET is

turned off.

The peak current during an input short condition is

calculated as follows, assuming that the output has

very low impedance and it is not a limiting factor:

PARASITIC

RVS

PEAK

Where:

PEAK

Peak current in PI2127 MOSFET before it is

turned off.

V :

Input voltage or load voltage at S pin before

input short condition did occur.

RVS

Reverse fault to MOSFET turn-off time.

PARASITIC

:Circuit parasitic inductance

The high peak current during an input short and

before the MOSFET turns off, stores energy in the

circuit parasitic inductance, and as soon as the

MOSFET turns off, the stored energy will be released

and this will produce a high negative voltage and

ringing at the MOSFET source. At the same time the

energy stored at the drain side of the internal

MOSFET will be released and produce a voltage

higher than the load voltage. This event will create a

high voltage difference between the drain and source

of the MOSFET. The MOSFET will avalanche, but

this avalanche will not affect the MOSFET

performance because the PI2127 has a fast

response time to the input fault condition and the

stored energy will be well below the MOSFET

avalanche capability.

MOSFET avalanche during input short is calculated

as follows:

PEAK

PARASITIC

DSS

−

Where:

E :

Avalanche energy

DSS

: MOSFET breakdown voltage (60V)

Power dissipation:

In Active ORing circuits the MOSFET is always on in

steady state operation and the power dissipation is

derived from the total source current and the on-state

resistance of the MOSFET.

The PI2127 internal MOSFET power dissipation can

be calculated with the following equation:

)

(

MOSFET

∗

Where:

Is:

Source Current

MOSFET

:MOSFET power dissipation

RDS(on):

MOSFET on-state resistance

Note: For the worst case condition, calculate with

maximum rated RDS(on) at the MOSFET maximum

operating junction temperature because RDS(on) is

temperature dependent. Refer to Figure 11 for

normalized RDS(on) values over temperature.

The

PI2127 maximum RDS(on) at 25°C is 11mΩ and will

increase by 43% at 125°C junction temperature.

The Junction Temperature rise is a function of power

dissipation and thermal resistance.

)

(

MOSFET

Trise

∗

Where:

θ :

Junction-to-Ambient thermal resistance

(45°C/Watt)

This may require iteration to get to the final junction

temperature.

Figure 13 and Figure 16 show the

PI2127 internal MOSFET final junction temperature

curves versus conducted current at maximum RDS(on),

given ambient temperatures and air flow.

Fault Circuit:

FT is an open collector pin and should be pulled up

to the logic voltage via a resistor (10KΩ).

An internal level shift circuit is implemented to change

the PI2127 controller fault output reference from the

PG pin voltage level to the GND pin voltage level. The

level shift circuit is biased from the D pin to stay active

when the bias voltage at S pin is not available.

the event of an input short fault condition, the S pin

will be pulled low (ground) and the PI2127 control

circuit will lose its bias voltage. If the output voltage is

supplied from a redundant source, then the level

shifter stays biased and the

FT pin will be pulled low

to indicate that the MOSFET is in the OFF condition.

During start-up and before the output voltage is

established, the

FT pin will be floating until the

approximately 4.5V is present at the S pin or at D pin.

Thereafter the

FT pin is pulled low and stays low until

the PI2127 controller bias voltage VS-PG increases

above the controller Under-Voltage Threshold (VSUVR)

and no fault conditions are present. Once this

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