PCA9504ADGG datasheet(4/29 Pages) PHILIPS

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Philips Semiconductors

Product data

PCA9504A

Glue chip 4

2004 May 11

PIN DESCRIPTION CONTINUED

PIN(S)

SYMBOL

FUNCTION

VSYNC_3V

VSYNCH input from chipset video

HSYNC_5V

HSYNCH output to monitor

VSYNC_5V

VSYNCH output to monitor

VCCP_VREF

Analog voltage reference for determining INIT/A20M input thresh-

olds

3IV/3O

STRAP

Strapping option for GP or FLUSH mode (internal pull-up resistor)

Note 1

GP3_IN

Generic logic gate 3 input

5V OD

GP3_OUT

Generic logic gate 3 output

NOTE:

1. The pin is internally pulled up to default to FLUSH mode.

TYPE

DESCRIPTION

3.3 V input signal

3IU

3.3 V input signal with internal pull-up

5 V input signal

5IU

5 V input signal with internal pull-up

5ID

5 V input signal with internal pull-down

Power (input)

Ground (input)

3.3 V output signal

5 V output signal

3V OD

3.3 V open-drain output signal

5V OD

5 v open-drain output signal

Analog output

Analog input

3IOD

3.3 V input/output open-drain

5IOD

5 V input/output open-drain

REFL

Input voltage levels referenced to VCCP_VREF

FUNCTION TABLES

Strapping Selection Pin

STRAP (pin 54)1

MODE1

PIN NAME & (PIN NUMBER)

1 No connect

FLUSH

GPO_FLUSH_CACHE (4)

1 No connect

FLUSH

A20M (5)

1 No connect

FLUSH

INIT (6)

1 No connect

FLUSH

FLUSH_OUT_CPU (7)

1 No connect

FLUSH

INIT_OUT (8)

0 GND

GP2_IN (4)

0 GND

GP1_INB (5)

0 GND

GP1_INA (6)

0 GND

GP1_OUT (7)

0 GND

GP2_OUT (8)

NOTE:

1. The pin is internally pulled up to default to FLUSH mode.

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