PCA9504ADGG datasheet(2/29 Pages) PHILIPS

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Philips Semiconductors

Product data

PCA9504A

Glue chip 4

2004 May 11

FEATURES

• Dual, Strapping, Selectable Feature Sets

• Audio-disable Circuit

• Mute Audio Circuit

• 5 V reference generation

• 5 V standby reference generation

• HD single color LED driver

• IDE reset signal generation/PCIRST# buffers

• PWROK (PWRGD_3V) signal generation

• Power Sequencing / BACKFEED_CUT

• Power Supply turn on circuitry

• RMSRST# generation

• Voltage translation for DDC to VGA monitor

• HSYNCH / VSYNCH voltage translation to VGA monitor

• 3-state buffers for test

• Extra GP Logic gates

• Power LED Drivers

• Flash FLUSH# / INIT# circuit

• 5 V I2C to 3.3 V SMBus conversion to 400 kHz

• Requires both 3.3 V and 5.0 V operating voltages

• 0 to +70 °C operating temperature range

• ESD protection exceeds 1000 V HBM per JESD22-A114 and

750 V CDM per JESD22-C101

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA

• Package offered: TSSOP56

DESCRIPTION

The PCA9504A Glue Chip 4 is a highly integrated and cost-efficient

custom ASIC that reduces logic part count, overall component cost,

and board space requirements for PC designers and manufacturers.

The Glue Chip 4 supports the latest generation of high-volume

platforms based on Intel

® processors and chipsets that require

additional external circuitry in order to function properly. It is used on

entry servers/workstations (840 and 860 chipsets), high-end

desktops (820 and 850 chipsets), as well as mid range (815, 830

and 845 chipsets) and low-end (810 chipset) motherboards. Some

of these functionalities include meeting timing specifications,

buffering signals, and switching between power wells.

The PCA9504A Glue Chip 4 integrates miscellaneous motherboard

logic and analog functions into a single, small footprint 56-pin

TSSOP device. The Glue Chip 4 typically resides on the

motherboard close to the I/O controller Hub (ICH) and is optimized

for the Intel 82801BA I/O controller hub (ICH2).

PIN CONFIGURATION

SW00578

VREF3IN

V_3P3_STBY

GPO_FLUSH_CACHE/GP1_IN

A20M/GP1_INB

INIT/GP1_INA

FLUSH_OUT_CPU/GP1_OUT

INIT_OUT/GP2_OUT

CLK_IN

SEL_33_66

GND

GP3_OUT

GP3_IN

STRAP

VCCP_VREF

VSYNC_5V

HSYNC_5V

VSYNC_3V

REF5V_STBY

HSYNC_3V

AUD_SHDN

MUTE_AUD

VREF5IN

PCIRST

PCRIST_OUT

AUD_EN

AUD_RST

IDE_RSTDRV

3V_DDCSCL

REF5V

RSMRST

GND

TEST_EN

GRN_LED

5V_DDCSCL

YLW_LED

3V_DDCSDA

5V_DDCSDA

CPU_PRESENT

SLP_S3

PS_ON

HD_LED

YLW_BLNK

SCK_BJT_GATE

GRN_BLNK

PWRGD_3V

FPRST

PWRGD_PS

PRIMARY_HD

31 FLUSH_OUT_FWH

SCSI

30 LATCHED_BACKFED_CUT

SECONDARY_HD

BACKFEED_CUT

GND

V_5P0_STBY

SLP_S5

ORDERING INFORMATION

PACKAGE

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

DRAWING NUMBER

56-Pin Plastic TSSOP

°C to +70 °C

PCA9504ADGG

SOT364-1

Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging.

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