© VITESSE SEMICONDUCTOR CORPORATION

Page 1

4/23/98

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC7125

1.0625 Gbits/sec Fibre

Channel Transceiver

G52121-0, Rev. 4.1

Features

General Description

The VSC7125 is a full-speed Fibre Channel Transceiver optimized for Disk Drive and other space con-

strained applications. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of REFCLK

and serializes it onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK frequency.

The VSC7125 also samples serial receive data on the RX PECL differential inputs, recovers the clock and data,

deserializes it onto the 10-bit receive data bus, outputs two recovered clocks at one twentieth of the incoming

baud rate and detects Fibre Channel “Comma” characters. The VSC7125 contains on-chip PLL circuitry for

synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream. These cir-

cuits are fully monolithic and require no external components.

VSC7125 Block Diagram

• ANSI X3T11 Fibre Channel Compatible

1.0625 Gbps Full-duplex Transceiver

• 10 Bit TTL Interface for Transmit and

Receive Data

• Monolithic Clock Synthesis and Clock

Recovery - No External Components

• 106.25 MHz TTL Reference Clock

• Low Power Operation - 650 mW

• Suitable for Both Coaxial and Optical

Link Applications

• 64 Pin, 10mm or 14mm PQFP

• Single +3.3V Power Supply

RX+

RX-

Q D

Serial to

Parallel

Clock

Recovery

Retimed

Data

÷ 10

Recovered

Comma

Detect

Q D

R0:9

Frame

Logic

COM_DET

EN_CDET

T0:9

PLL Clock

Multiply

D Q

Parallel

to Serial

Serial Data

Clock

Synthesized

Clock

D Q

TX+

TX-

EWRAP

÷ 20

RCLK

Resync

10

10

REFCLK

2:1

RCLKN