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LM26 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LM26 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 20 page ![]() Electrical Characteristics (Continued) Unless otherwise specified, V IN = 15V, GND = PGND = 0V, VLIN5 = VDD1 = VDD2. Limits appearing in boldface type apply over the specified operating junction temperature range, (-20˚C to +125˚C, if not otherwise specified). Specifications appearing in plain type are measured using low duty cycle pulse testing with T A = 25˚C (Note 6), (Note 7). Min/Max limits are guaranteed by design, test, or statistical analysis. Symbol Parameter Conditions Min Typ Max Units I FB1,IFB2 Feedback Input Bias Current V FB1_FIX = 1.5V, VFB2_FIX = 1.5V 65 ±200 nA I comp1_SC, I comp2_SC COMP Output Source Current V FB1_FIX =VFB2_FIX = 1V, V COMP1 =VCOMP2 =1V 18 113 µA 0˚C to 125˚C 32 -40˚C to 125˚C 6 I comp1_SK, I comp2_SK COMP Output Sink Current V FB1_FIX =VFB2_FIX = 1.5V and V COMP1 =VCOMP2 = 0.5V 18 108 µA 0˚C to 125˚C 32 -40˚C to 125˚C 6 gm1, gm2 Transconductance 650 µmho GI SNS1, GI SNS2 Current Sense Amplifier (1&2) Gain V COMPx = 1.25V 4.2 5.2 7.5 Voltage References and Linear Voltage Regulators UVLO VLIN5 Under-voltage Lockout Threshold Rising ON/SS1, ON/SS2 transition from low to high 3.6 4.0 4.4 V Logic Outputs I OL PGOOD Low Sink Current V PGOOD = 0.4V 0.60 0.95 mA I OH PGOOD High Leakage Current V PGOOD =5V 5 200 nA Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Range indicates conditions for which the device is intended to be functional, but does not guarantee specfic performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: ON/SS1 and ON/SS2 are internally pulled up to one diode drop above VLIN5. Do not apply an external pull-up voltage to these pins. It may cause damage to the IC. Note 3: The maximum allowable power dissipation is calculated by using PDMAX =(TJMAX -TA)/θJA, where TJMAX is the maximum junction temperature, TA is the ambient temperature and θJA is the junction-to-ambient thermal resistance of the specified package. The 1.1W rating results from using 125˚C, 25˚C, and 90.6˚C/W for TJMAX,TA, and θJA respectively. A θJA of 90.6˚C/W represents the worst-case condition of no heat sinking of the 28-pin TSSOP. A thermal shutdown will occur if the temperature exceeds the maximum junction temperature of the device. Note 4: For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook available from National Semiconductor Corporation. Note 5: For testing purposes, ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5k Ω resistor. Note 6: A typical is the center of characterization data measured with low duty cycle pulse tsting at TA = 25˚C. Typicals are not guaranteed. Note 7: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TA =TJ = 25˚C. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 8: Both switching controllers are off. The linear regulator VLIN5 remains on. Note 9: When SS1 and SS2 pins are charged above this voltage and either of the output voltages at Vout1 or Vout2 is still below the regulation limit, the under voltage protection feature is initialized. www.national.com 6 |
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