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PCM1803 Datasheet(PDF) 3 Page - Texas Instruments

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Part # PCM1803
Description  SINGLE-ENDED, ANALOG-INPUT 24-BIT, 96-kHz STEREO A/D CONVERTER
PDF  20 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCM1803 Datasheet(HTML) 3 Page - Texas Instruments

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DEVICE INFORMATION
ABSOLUTE MAXIMUM RATINGS
PCM1803
SLES125 – NOVEMBER 2004
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
AGND
6
Analog GND
BCK
11
I/O
Audio data bit clock input/output(1)
BYPAS
8
I
HPF bypass control. LOW: Normal mode (dc reject); HIGH: Bypass mode (through)(2)
DGND
13
Digital GND
DOUT
12
O
Audio data digital output
FMT0
17
I
Audio data format select input 0. See Data Format section.(2)
FMT1
18
I
Audio data format select input 1. See Data Format section.(2)
LRCK
10
I/O
Audio data latch enable input/output (1)
MODE0
19
I
Mode select input 0. See Data Format section. (2)
MODE1
20
I
Mode select input 1. See Data Format section. (2)
OSR
16
I
Oversampling ratio select input. LOW:
×64 f
S, HIGH: ×128 fS
(2)
PDWN
7
I
Power-down control, active-low (2)
SCKI
15
I
System clock input: 256 fS, 384 fS, 512 fS or 768 fS (3)
TEST
9
I
Test, must be connected to DGND (2)
VCC
5
Analog power supply, 5-V
VDD
14
Digital power supply, 3.3-V
VINL
1
I
Analog input, L-channel
VINR
2
I
Analog input, R-channel
VREF1
3
Reference-voltage-1 decoupling capacitor
VREF2
4
Reference-voltage-2 decoupling capacitor
(1)
Schmitt-trigger input
(2)
Schmitt-trigger input with internal pulldown (50 k
Ω typically), 5-V tolerant
(3)
Schmitt-trigger input, 5-V tolerant
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage
VCC
–0.3 V to 6.5 V
Supply voltage
VDD
–0.3 V to 4 V
Ground voltage differences
AGND, DGND
±0.1 V
Digital input voltage, VI
LRCK, BCK, DOUT
–0.3 V to (VDD + 0.3 V) < 4 V
Digital input voltage, VI
PDWN, BYPAS, TEST, SCKI, OSR, FMT0,
–0.3 V to 6.5 V
FMT1, MODE0, MODE1
Analog input voltage, VI
VINL, VINR, VREF1, VREF2
–0.3 V to (VCC + 0.3 V) < 6.5 V
Input current, II
Any pins except supplies
±10 mA
Ambient temperature under bias, Tbias
–40
°C to 125°C
Storage temperature, Tstg
–55
°C to 150°C
Junction temperature, TJ
150
°C
Lead temperature (soldering)
260
°C, 5 s
Package temperature (IR reflow, peak)
260
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3



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