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LM1262 Datasheet(PDF) 13 Page - National Semiconductor (TI) |
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LM1262 Datasheet(HTML) 13 Page - National Semiconductor (TI) |
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13 / 20 page ![]() Functional Description (Continued) 1. A logic level vertical blanking pulse comes in at pin 13. Bit 2 of register 0B is set to a “0” to enable this method. There is no output for DAC4, but its output is still con- nected to DAC1-3 inputs, maintaining the brightness feature. WARNING: A 4.7 k Ω resistor must be in series with pin 13 when it is used for the vertical blanking input, see Note 18. 2. A sandcastle pulse comes in at pin 23. Bit 2 of register 0B is set to a “1”, the default value. Vertical blanking is detected from the sandcastle pulse. Note that bit 1 of register 0B must also be set to a “1” for proper detection of the sandcastle pulse. The output of DAC4 is con- nected to pin 13 as well as DAC1-3. The sandcastle detection is compatible with the sandcastle pulse gener- ated by the Philips defection controller parts. Power Save Mode: There are two modes of power save: 1. Blanking the video 2. Turning off most of the power for maximum power sav- ings. In the first mode the video is completely blanked. By setting bit-0 in register 9 to a 1 the video will be completely blanked. This gives some power savings since there is no beam current in the monitor. Maximum power saving is obtained in the second mode. Bits 0 and 1 in register 9 should be set to a 1. Bit 1 in register 9 turns off the video output stage of the LM1262, giving a high impedance at the output pin. After bits 0 and 1 of register 9 are set to a 1, the power supplies to the CRT driver and CRT can be turned off. Note: The 5V supply must remain on for proper operation. Since the LM1262 is a CMOS device its power consumption will be minimal. External DACs: Four DACs with external outputs are pro- vided in the LM1262. Normally these DACs will be used for color balance and brightness control. If the brightness con- trol is done at G1, then three DACs would be used for color balance and the last DAC would be used for controlling the G1 voltage. There is also a provision to set the brightness at the cath- odes. DAC 4 can be set to vary the outputs of the other three DACs after the color balance is completed. This is accom- plished by adding the output of DAC 4 to the other 3 DACs. Bits 3 and 4 of register 9 are set to a 1 for brightness control at the cathodes. Bit 3 sets the output range of DAC 1–3 to 50% of their full range. Bit 4 adds 50% of DAC 4 to the other three DACs. These two adjustments keeps the overall output voltage of DAC 1–3 in the proper range and still allows brightness control. For either mode of brightness control, the DACs are ideally set to work with the LM2479 or LM2480 for DC restoration at the cathodes of the CRT. When the brightness control is done at the cathodes and the output of DAC 4 is not used, then pin 13 can be used as a vertical input. This function is controlled by bit 2 in register B. ESD and Arc-Over Protection The LM1262 incorporates full ESD protection with special consideration given to maximizing arc-over robustness. The monitor designer must still use good circuit design and PCB layout techniques. The human body model ESD susceptibil- ity of the LM1262 is 3.5 kV, however many monitor manu- facturers are now testing their monitors to the level 4 of the IEC 801-2 specification which requires the monitor to survive an 8 kV discharge. External ESD protection is needed to survive this level of ESD. The LM1262 provides excellent protection against both ESD and arc-over, but this is not a substitute for good PCB layout. Figure 7 shows the recommended input protection for the LM1262. This provides the best protection against ESD. When this protection is combined with good PCB layout the LM1262 will easily survive the IEC 801-2 level 4 testing (8 kV ESD). It is strongly recommended that the protection diodes be added as shown in Figure 7. The 1N4148 diode has a maximum capacitance of 4 pF, which will have little effect on the response of the video system due to the low impedance of the input video. The ESD cells of the LM1262 also provide good protection against arc-over, however good PCB layout is necessary. The LM1262 should not be exposed directly to the voltages that may occur during arc-over. The main vulnerability of the LM1262 to arc-over is though the ground traces on the PCB. For proper protection all ground connections associated with the LM1262, including the grounds to the bypass capacitors, must have short returns to the ground pins. A significant ground plane should be used to connect all the LM1262 grounds. Figure 10, which shows the demo board layout, is an excellent example of an effective ground plane. The list below should be followed to ensure a PCB with good grounding: • All grounds associated with the LM1262 should be con- nected together through a large ground plane. • CRT driver ground is connected to the video pre-amp ground at one point. • CRT and arc protection grounds are connected directly to the chassis or main ground. There is no arc-over current flow from these grounds through the LM1262 grounds. • Input signal traces for SDA, SCL, H Flyback, and Clamp should be kept away from the CRT driver and all traces that could carry the arc current. • Output signal traces of the LM1262 should be kept away from the traces that carry the output signals of the CRT driver. If any one of the above suggestions is not followed the LM1262 may become more vulnerable to arc-over. Improper grounding is by far the most common cause of video pre- amp failures during arc-over. DS200404-29 FIGURE 7. Recommended Video Input ESD Protection www.national.com 13 |
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