NCD1015ZP datasheet(5/6 Pages) IXYS

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INTEGRATED CIRCUITS DIVISION

NCD1015ZP

R02

www.ixysic.com

2.4 Transmission Protocol

2.4.1 Transponder - Response Data Format

An RFID answer by the NCD1015ZP contains a

Header, the identification DATA, a CRC value, and a

Trailer.

Framed as shown below in Figure 3 the transmitted

signal has a fixed length of 128 bits. The Header

consists of a16-bit Pre-Bits leader followed by an 8-bit

Start byte. Following the CRC error checking value is

the Trailer consisting of an 8-bit Stop byte followed by

the 16-bit Post.

Depending on the value of the sixteenth Data bit,

logical data address [48], the Stop byte value

changes. When the identification data stored in the

NCD1050ZP complies with ISO 11784, data bit 16 as

defined in ISO 11784 will be 0 and the Stop byte value

will be 0x7E. For identification data not compliant with

ISO 11784 the Stop byte value will be determined by

the value stored in the sixteenth bit of the data.

The Data, CRC, Stop and Post data will be transmitted

starting with the LSB and ending with the MSB.

Figure 3: Tag Response Frame Format

All signals are coded [MSB:LSB].

• Pre-Bits [15:0] . . . = 0x0000

• Start Byte [7:0] . . = 0x7E

• Data [63:0] . . . . . = Data

• CRC [15:0] . . . . . = Data CRC

• Stop Byte [7:0] . . = 0x7E - Data bit 16 = 0

‡

• Stop Byte [7:0] . . = 0x1E - Data bit 16 = 1‡

• Post Bits [15:0] . . = 0x0000

‡ Data bit position as defined in ISO 11784

2.4.2 CRC - CCITT Error Checking

The CRC generator circuitry creates a 16 bit CRC to

ensure the integrity of the data packets received by the

transponder. The reader and transponder use the

CRC-CCITT (Consultative Committee for International

Telegraph and Telephone) algorithm for error

detection.

The 16-bit cyclic redundancy code is calculated using

the following polynomial:

P(X) = x16 + x12 + x5 + x0

The implemented version of the CRC check has the

following characteristics:

• Reverse CRC-CCITT 16 as described in

ISO/IEC 13239 and used in ISO/IEC

11784/11785.

• The CRC 16-bit shift register is initialized to all

zeros (0x0000).

• The incoming data bits are XOR-ed with the

MSB of the CRC register and is shifted into the

• After all data bits have been processed, the

CRC register contains the CRC-16 code.

• Reversibility - The original data, together with

associated CRC, when fed back into the same

CRC generator will regenerate the initial value

(all zero's).

Figure 4: Schematic Diagram of the 16-Bit CRC-CCITT Generator

Pre-Bits

Start

Data

CRC

Stop

Post

89 (LSB)

104

105

112

113

128

P (X) =

X0X1

X2X3

X7X8

X9X10 X11

X12 X13 X14 X15

MSB

Data in

LSB

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