Typical Circuit Waveforms

Applications Information

EXTERNAL CAPACITORS

The LM2926/7 output capacitor is required for stability. With-

out it, the regulator output will oscillate at amplitudes as high

as several volts peak-to-peak at frequencies up to 500 kHz.

Although 10 µF is the minimum recommended value, the ac-

tual size and type may vary depending upon the application

load and temperature range. Capacitor equivalent series re-

sistance (ESR) also affects stability. The region of stable op-

eration is shown in the Typical Performance Characteris-

tics (Output Capacitor ESR curve).

Output capacitors can be increased in size to any desired

value above 10 µF. One possible purpose of this would be to

maintain the output voltage during brief conditions of input

transients that might be characteristic of a particular system.

Capacitors must also be rated at all ambient temperatures

expected in the system. Many aluminum electrolytics freeze

at temperatures below −30˚C, reducing their effective ca-

pacitance to zero. To maintain regulator stability down to

−40˚C, capacitors rated at that temperature (such as tantal-

ums) must be used.

DELAYED RESET

The delayed reset output is designed to hold a microproces-

sor in a reset state on system power-up for a programmable

time interval to allow the system clock and other powered cir-

cuitry to stabilize. A full reset interval is also generated when-

ever the output voltage falls out of regulation. The circuit is

tripped whenever the output voltage of the regulator is out of

regulation by the Reset Threshold value. This can be caused

by low input voltages, over current conditions, over-voltage

shutdown, thermal shutdown, and by both power-up and

power-down sequences. When the reset circuit detects one

of these conditions, the delay capacitor is discharged by an

SCR and held in a discharged state by a saturated NPN

switch. As long as the delay capacitor is held low, the reset

output is also held low. Because of the action of the SCR, the

reset output cannot glitch on noise or transient fault condi-

tions. A full reset pulse is obtained for any fault condition that

trips the reset circuit.

When the output regains regulation, the SCR is switched off

and a small current (I

Reset Delay

DS010759-29

Reset Delay

DS010759-30

DS010759-5

5

www.national.com