effective capacitance to zero. To maintain regulator stability

down to −40˚C, capacitors rated at that temperature (such as

tantalums) must be used.

Each output must be terminated by a capacitor, even if it is

not used.

STANDBY OUTPUT

The standby output is intended for use in systems requiring

standby memory circuits. While the high current regulator

outputs are controlled with the ON/OFF pin described later,

the standby output remains on under all conditions as long

as sufficient input voltage is supplied to the IC. Thus,

memory and other circuits powered by this output remain un-

affected by positive line transients, thermal shutdown, etc.

The standby regulator circuit is designed so that the quies-

regulator outputs are off.

The capacitor on the output of this regulator can be in-

creased without bound. This will help maintain the output

voltage during negative input transients and will also help to

reduce the noise on all three outputs. Because the other two

track the standby output: therefore any noise reduction here

will also reduce the other two noise voltages.

BUFFER OUTPUT

The buffer output is designed to drive peripheral sensor cir-

cuitry in a µP system. It will track the standby and main regu-

lator within a few millivolts in normal operation. Therefore, a

peripheral sensor can be powered off this supply and have

the same operating voltage as the µP system. This is impor-

tant if a ratiometric sensor system is being used.

The buffer output can be short circuited while the other two

outputs are in normal operation. This protects the µP system

from disruption of power when a sensor wire, etc. is tempo-

rarily shorted to ground, i.e. only the sensor signal would be

interrupted, while the µP and memory circuits would remain

operational.

The buffer output is similar to the main output in that it is con-

trolled by the ON/OFF switch in order to save power in the

standby mode. It is also fault protected against overvoltage

and thermal overload. If the input voltage rises above ap-

proximately 30V (e.g. load dump), this output will automati-

cally shut down. This protects the internal circuitry and en-

ables the IC to survive higher voltage transients than would

otherwise be expected. Thermal shutdown is necessary

since this output is one of the dominant sources of power

dissipation in the IC.

MAIN OUTPUT

The main output is designed to power relatively large loads,

i.e. approximately 500 mA. It is therefore also protected

against overvoltage and thermal overload.

This output will track the other two within a few millivolts in

normal operation. It can therefore be used as a reference

voltage for any signal derived from circuitry powered off the

standby or buffer outputs. This is important in a ratiometric

sensor system or any system requiring accurate matching of

power supply voltages.

ON/OFF SWITCH

The ON/OFF switch controls the main output and the buffer

output. The threshold voltage is compatible with most logic

families and has about 20 mV of hysteresis to insure “clean”

switching from the standby mode to the active mode and

vice versa. This pin can be tied to the input voltage through

a10 k

Ω resistor if the regulator is to be powered continu-

ously.

POWER DOWN OVERRIDE

Another possible approach is to use a diode in series with

the ON/OFF signal and another in series with the main out-

put in order to maintain power for some period of time after

the ON/OFF signal has been removed (see

Figure 1). When

the ON/OFF switch is initially pulled high through diode D1,

the main output will turn on and supply power through diode

D2 to the ON/OFF switch effectively latching the main out-

put. An open collector transistor Q1 is connected to the ON/

OFF pin along with the two diodes and forces the regulators

off after a period of time determined by the µP. In this way,

the µP can override a power down command and store data,

do housekeeping, etc. before reverting back to the standby

mode.

RESET OUTPUT

This output is an open collector NPN transistor which is

forced low whenever an error condition is present at the

main output or when a µP error is sensed (see µP Monitor

section). If the main output voltage drops by 350 mV or rises

out of regulation by 600 mV typically, the RESET output is

forced low and held low for a period of time set by two exter-

nal components, R

teresis in these two threshold voltages so that the RESET

output has a fast rise and fall time compatible with the re-

quirements of most µP RESET inputs.

DELAYED RESET

Resistor R

RESET output is held low after a main output error condition

has been sensed. The delay is given by the formula:

T

The delayed RESET will be initiated any time the main out-

put is out of regulation, i.e. during power-up, short circuit, ov-

ervoltage, low line, thermal shutdown or power-down. The

µP is therefore RESET whenever the output voltage is out of

regulation. (It is important to note that a RESET is only initi-

ated when the main output is in error. The buffer and standby

outputs are not directly monitored for error conditions.)

µP MONITOR RESET

There are two distinct and independent error monitoring sys-

tems in the LM2984. The one described above monitors the

main regulator output and initiates a delayed RESET when-

ever this output is in error. The other error monitoring system

is the µP watchdog. These two systems are OR’d together

internally and both force the RESET output low when either

type of error occurs.

DS011252-13

FIGURE 1. Power Down Override

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