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LAN88730AM-C Datasheet(PDF) 4 Page - Microchip Technology

Part # LAN88730AM-C
Description  Small Footprint MII/RMII 10/100 Ethernet Transceiver for Automotive Applications
PDF  82 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN88730AM-C Datasheet(HTML) 4 Page - Microchip Technology

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LAN88730
DS60001256B-page 4
 2012-2015 Microchip Technology Inc.
1.0
INTRODUCTION
1.1
General Terms and Conventions
The following is a list of the general terms used throughout this document:
1.2
General Description
The LAN88730 is a low-power 10BASE-T/100BASE-TX physical layer (PHY) transceiver with variable I/O voltage that
is compliant with the IEEE 802.3 and 802.3u standards. The LAN88730 has been designed and tested to automotive
grade specifications.
The LAN88730 supports communication with an Ethernet MAC via a standard MII (IEEE 802.3u)/RMII interface. It con-
tains a full-duplex 10-BASE-T/100BASE-TX transceiver and supports 10 Mbps (10BASE-T) and 100 Mbps (100BASE-
TX) operation. The LAN88730 implements auto-negotiation to automatically determine the best possible speed and
duplex mode of operation. HP Auto-MDIX support allows the use of direct connect or cross-over LAN cables.
The LAN88730 supports both IEEE 802.3-2005 compliant and vendor-specific register functions. However, no register
access is required for operation. The initial configuration may be selected via the configuration pins as described in Sec-
tion 3.7, "Configuration Straps". Register-selectable configuration options may be used to further define the functionality
of the transceiver.
Per IEEE 802.3-2005 standards, all digital interface pins are tolerant to 3.6 V. The device can be configured to operate
on a single 3.3 V supply utilizing an integrated 3.3 V to 1.2 V linear regulator.
The LAN88730 is available in automotive grade A (-40°C to +85°C) and B (-40°C to +105°C) temperature range ver-
sions. A typical system application is shown in Figure 1-1. Figure 1-2 provides an internal block diagram of the device.
BYTE
8 bits
FIFO
First In First Out buffer; often used for elasticity buffer
MAC
Media Access Controller
MII
Media Independent Interface
RMII™
Reduced Media Independent Interface
N/A
Not Applicable
X
Indicates that a logic state is “don’t care” or undefined.
RESERVED Refers to a reserved bit field or address. Unless otherwise noted, reserved bits must always be zero
for write operations. Unless otherwise noted, values are not guaranteed when reading reserved bits.
Unless otherwise noted, do not read or write to reserved addresses.
SMI
Serial Management Interface
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
LAN88730
10/100
Ethernet
MAC
MII/
RMII
Mode
LED
Transformer
Crystal or
Clock
Oscillator
MDI
RJ45



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