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ADC08D1000EVAL Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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ADC08D1000EVAL Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 31 page  ADC08D1000 High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter General Description NOTE: This product is currently in development. – ALL specifications are design targets and are subject to change. The ADC08D1000 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. Consuming a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and- hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10 -18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compliant with IEEE 1596.3-1996, with the exception of a reduced common mode voltage of 0.8V. Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate. The two converters can be interleaved and used as a single 2 GSPS ADC. The converter typically consumes less than 20 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the indus- trial (-40˚C ≤ T A ≤ +85˚C) temperature range. Features n Internal Sample-and-Hold n Single +1.9V ±0.1V Operation n Choice of SDR or DDR output clocking n Interleave Mode for 2x Sampling Rate n Multiple ADC Synchronization Capability n Guaranteed No Missing Codes n Serial Interface for Extended Control n Fine Adjustment of Input Full-Scale Range and Offset Key Specifications n Resolution 8 Bits n Max Conversion Rate 1 GSPS (min) n Bit Error Rate 10 -18 (typ) n ENOB @ 500 MHz Input 7.5 Bits (typ) n DNL ±0.25 LSB (typ) n Power Consumption — Operating 1.6 W (typ) — Power Down Mode 20 mW (typ) Applications n Direct RF Down Conversion n Digital Oscilloscopes n Satellite Set-top boxes n Communications Systems n Test Instrumentation Block Diagram 20097453 ADVANCE INFORMATION September 2004 © 2004 National Semiconductor Corporation DS200974 www.national.com |
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