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HV9989 Datasheet(PDF) 5 Page - Microchip Technology |
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HV9989 Datasheet(HTML) 5 Page - Microchip Technology |
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5 / 22 page  2014 Microchip Technology Inc. DS20005296B-page 5 HV9989 Gate (GATE1, GATE2 and GATE3) ISOURCE Gate short circuit current, sourcing 20.2 — — A VGATE = 0V ISINK Gate sinking current 2 0.4 — — A VGATE = VDD TRISE Gate output rise time — — 50 85 ns CGATE = 1.0nF TFALL Gate output fall time — — 25 45 ns CGATE = 1.0nF DMAX Maximum duty cycle 2 — 91 — % — Over-voltage Protection (OVP1, OVP2 and OVP3) VOVP,rising Over-voltage rising trip point 1 4.7 — 5.4 V OVP rising Current Sense (CS1, CS2 and CS3) TBLANK Leading edge blanking 1 210 — 460 ns — TDELAY Delay to GATE —— — 250 ns 50mV overdrive to the current sense comparator Slope Compensation (SC) CSC(EFF) Effective capacitance 2 0.9 1.0 1.1 nF — ∆VSC VDD-to-SC voltage drop 1 1.25 — 3.25 V RSC = 120kΩ Internal Transconductance Opamp (Gm1, Gm2 and Gm3) GB Gain bandwidth product 2 — 1.0 — MHz 75pF capacitance at COMP pin AV Open loop DC gain — 65 — — dB Output open KCOMP COMP-to-CS divider ratio 2 — 1/12 — — — VCM Input common-mode range 2 -0.3 — 3.0 V — VO Output voltage range 2 0.7 — 6.75 V — Gm Transconductance — 500 — 700 μA/V — VOFFSET Input offset voltage — -5.0 — 5.0 mV — IBIAS Input bias current 2 — 0.5 1.0 nA — TR Recovery delay 2— 120 — ns FDBK = 0V, REF = 0.5V, PWMD rising Oscillator (CLOCK) fOSC1 Oscillator frequency — — 500 — kHz FCLOCK = 6.0MHz KSW Oscillator divider ratio 2 — 12 — - — Phi1 GATE1-GATE2 phase delay 2 — 120 — ° — Phi1 GATE1-GATE3 phase delay 2 — 240 — ° — Oscillator (CLOCK) TOFF CLOCK low time 2 50 — — ns — TON CLOCK high time 2 50 — — ns — VCLOCK,HI CLOCK input high 1 2.0 — — V — VCLOCK,L O CLOCK input low 1— — 0.8 V — TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED) (SHEET 2 OF 3)1 Symbol Parameter Note Min Typ Max Units Conditions Note 1: Applies over the full operating ambient temperature range of 0°C < TA < +85°C. 2: For design guidance only. |
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