MCP652 datasheet(6/62 Pages) MICROCHIP

6 / 62 page

MCP651/1S/2/3/4/5/9

DS20002146D-page 6

 2009-2014 Microchip Technology Inc.

1.3

Timing Diagram

FIGURE 1-1:

Timing Diagram.

TABLE 1-4:

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.5V to +5.5V, VSS = GND.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Temperature Ranges

Specified Temperature Range

-40

—

+125

°C

Operating Temperature Range

-40

—

+125

°C

(Note 1)

Storage Temperature Range

-65

—

+150

°C

Thermal Package Resistances

Thermal Resistance, 5L-2×3 SOT

JA

—

220.7

—

°C/W

Thermal Resistance, 6L-2×3 SOT

JA

—

190.5

—

°C/W

Thermal Resistance, 8L-2×3 TDFN

JA

—

52.5

—

°C/W

Thermal Resistance, 8L-3×3 DFN

JA

—63

—

°C/W

(Note 2)

Thermal Resistance, 8L-SOIC

JA

—

163

—

°C/W

Thermal Resistance, 10L-3×3 DFN

JA

—71

—

°C/W

(Note 2)

Thermal Resistance, 10L-MSOP

JA

—

202

—

°C/W

Thermal Resistance, 14L-SOIC

JA

—

95.3

—

°C/W

Thermal Resistance, 14L-TSSOP

JA

—

100

—

°C/W

Thermal Resistance, 16L-4x4-QFN

JA

—46

—

°C/W

(Note 2)

Note 1:

Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).

Measured on a standard JC51-7, four-layer printed circuit board with ground plane and vias.

High Z

VDD

VOUT

-3 µA (typical)

High Z

ISS

ICS

-3 µA (typical)

-6 mA (typical)

VPRH

VPRL

tPON

tPOFF

0nA(typical)

High Z

-3 µA (typical)

-6 mA (typical)

tCOFF

tCON

0.7 µA (typical)

0 nA (typical)

CAL/CS

VIH

VIL

tCSU

Note:

For the MCP655 dual and the MCP659 quad, there is an additional constraint on toggling the two CAL/CS pins close

together; see the T

CON specification in Table 1-3.

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