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HD64F3687 Datasheet(PDF) 79 Page - Renesas Technology Corp |
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HD64F3687 Datasheet(HTML) 79 Page - Renesas Technology Corp |
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79 / 504 page ![]() Rev. 3.00, 05/03, page 49 of 472 Vector Relative Module Exception Sources Number Vector Address Priority A/D converter A/D conversion end 25 H'0032 to H'0033 High Timer Z Compare match/input capture A0 to D0 Timer Z overflow 26 H'0034 to H'0035 Compare match/input capture A1 to D1 Timer Z overflow Timer Z underflow 27 H'0036 to H'0037 Timer B1 Timer B1 overflow 29 H'003A to H'003B SCI3_2 Receive data full Transmit data empty Transmit end Receive error 32 H'0040 to H'0041 Low Note: * A low-voltage detection interrupt is enabled only in the product with an on-chip power- on reset and low-voltage detection circuit. 3.2 Register Descriptions Interrupts are controlled by the following registers. • Interrupt edge select register 1 (IEGR1) • Interrupt edge select register 2 (IEGR2) • Interrupt enable register 1 (IENR1) • Interrupt enable register 2 (IENR2) • Interrupt flag register 1 (IRR1) • Interrupt flag register 2 (IRR2) • Wakeup interrupt flag register (IWPR) |
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